riscv-openocd/tcl
Tarek BOCHKATI c9d40366ad flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA
STM32L5 flash memory is aliased to 0x0C000000, this address mapping
is used for secure applications. (0x08000000 for non-secure)

this change allows the programming of secure and non-secure flash
when trustzone is enabled and RDP level is 0

Change-Id: I89d1f1b5d493cf01a142ca4dbfef5a3731cab96e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5936
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 06:19:15 +00:00
..
board tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
chip tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
cpld xilinx-xc7: Add additional IDCODEs. 2018-10-27 14:37:43 +01:00
cpu tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
fpga tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
interface tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
target flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA 2021-08-26 06:19:15 +00:00
test tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
tools tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
bitsbytes.tcl tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
mem_helper.tcl tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
memory.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
mmr_helpers.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00