52 lines
1.4 KiB
INI
52 lines
1.4 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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adapter speed 1000
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adapter driver ftdi
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ftdi vid_pid 0x0403 0x6010
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# change to on to enable cJTAG 2-wire OSCAN1 protocol
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# ocan1_mode -> nscan1_mode in 2023.10 Nuclei OpenOCD release
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# ftdi oscan1_mode off
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ftdi nscan1_mode off
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## bindto 0.0.0.0 can be used to cover all available interfaces.
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## Uncomment bindto line to enable remote machine debug
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# bindto 0.0.0.0
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# specify adapter serial to select a ftdi chip if you have multiple jtag devices
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# adapter serial "FT6S9RD6"
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transport select jtag
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ftdi layout_init 0x0008 0x001b
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ftdi layout_signal nSRST -oe 0x0020 -data 0x0020
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ftdi layout_signal TCK -data 0x0001
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ftdi layout_signal TDI -data 0x0002
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ftdi layout_signal TDO -input 0x0004
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ftdi layout_signal TMS -data 0x0008
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ftdi layout_signal JTAG_SEL -data 0x0100 -oe 0x0100
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set _CHIPNAME riscv
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jtag newtap $_CHIPNAME cpu -irlen 5
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME riscv -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME nuspi 0x20000000 0 0 0 $_TARGETNAME
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init
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if {[ info exists pulse_srst]} {
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ftdi_set_signal nSRST 0
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ftdi_set_signal nSRST z
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}
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halt
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# We must turn on this because otherwise the IDE version debug cannot download the program into flash
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flash protect 0 0 last off
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