# SPDX-License-Identifier: GPL-2.0-or-later

adapter speed 1000

adapter driver ftdi
ftdi vid_pid 0x0403 0x6010
# change to on to enable cJTAG 2-wire OSCAN1 protocol
# ocan1_mode -> nscan1_mode in 2023.10 Nuclei OpenOCD release
# ftdi oscan1_mode off
ftdi nscan1_mode off

## bindto 0.0.0.0 can be used to cover all available interfaces.
## Uncomment bindto line to enable remote machine debug
# bindto 0.0.0.0

# specify adapter serial to select a ftdi chip if you have multiple jtag devices
# adapter serial "FT6S9RD6"

transport select jtag

ftdi layout_init 0x0008 0x001b
ftdi layout_signal nSRST -oe 0x0020 -data 0x0020
ftdi layout_signal TCK -data 0x0001
ftdi layout_signal TDI -data 0x0002
ftdi layout_signal TDO -input 0x0004
ftdi layout_signal TMS -data 0x0008
ftdi layout_signal JTAG_SEL -data 0x0100 -oe 0x0100


set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME nuspi 0x20000000 0 0 0 $_TARGETNAME

init

if {[ info exists pulse_srst]} {
  ftdi_set_signal nSRST 0
  ftdi_set_signal nSRST z
}
halt

# We must turn on this because otherwise the IDE version debug cannot download the program into flash

flash protect 0 0 last off