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riscv-openocd/tcl
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Franck Jullien 4e79b48e2c Add new target type: OpenRISC 
Add support for OpenRISC target. This implementation
supports the adv_debug_sys debug unit core. The mohor
dbg_if is not supported. Support for mohor TAP core
and Altera Virtual JTAG core are also provided.

Change-Id: I3b1cfab1bbb28e497c4fca6ed1bd3a4362609b72
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1547
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
 		2013-09-26 09:52:56 +00:00
..
board Add new target type: OpenRISC 2013-09-26 09:52:56 +00:00
chip Fix a typo. 2013-07-07 13:00:59 +00:00
cpld Add config file for Lattice LC4032ZE CPLD (ispMACH 4000ZE family) 2012-07-17 08:29:32 +00:00
cpu/arm Move TCL script files -- Step 2 of 2: 2009-05-27 06:49:24 +00:00
interface jtag: drivers: Add JTAP VPI client driver 2013-09-08 15:37:51 +00:00
target Add new target type: OpenRISC 2013-09-26 09:52:56 +00:00
test TCL scripts: replace "puts" with "echo" 2010-11-09 08:12:51 +01:00
bitsbytes.tcl TCL scripts: replace "puts" with "echo" 2010-11-09 08:12:51 +01:00
mem_helper.tcl TCL scripts: fix ocd_mem2array/mem2array 2010-09-28 10:44:50 +02:00
memory.tcl tcl: remove silly ocd_ prefix to array2mem and mem2array 2010-08-11 17:24:55 +02:00
mmr_helpers.tcl TCL scripts: replace "puts" with "echo" 2010-11-09 08:12:51 +01:00