riscv-openocd/tcl
Ian Thompson 3d3f823920 target/xtensa: add dual-core support
- Example for configuring multiple non-SMP
  Xtensa cores e.g. for heterogeneous debug
- JTAG only at this time; DAP out of scope
- Dual-Xtensa Palladium example via VDebug
- Update Xtensa core config examples

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I6d2b3d13fa8075416dcd383cf256a3e8582ee1c1
Reviewed-on: https://review.openocd.org/c/openocd/+/8078
Tested-by: jenkins
Reviewed-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-28 14:17:28 +00:00
..
board target/xtensa: add dual-core support 2024-01-28 14:17:28 +00:00
chip tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
cpld jtagspi/pld: add interface to get support from pld drivers 2023-09-23 14:33:37 +00:00
cpu tcl/arc: Fix ARC v2 registers r22/r23 2023-09-02 10:40:34 +00:00
fpga ipdbg/pld: ipdbg can get tap and hub/ir from pld driver. 2023-07-08 18:04:24 +00:00
interface tcl/interface/ftdi: Add documentation for HS2 2023-09-17 12:06:44 +00:00
target target/xtensa: add dual-core support 2024-01-28 14:17:28 +00:00
test tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
tools tcl/tools/test_cpu_speed: Fix register name 2023-03-18 21:59:47 +00:00
bitsbytes.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mem_helper.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
memory.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mmr_helpers.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00