Evgeniy Naydanov 8c82210c43 Merge up to a168c63412 from upstream ... There was a bunch of conflicts due to commit 297844cf46 ("target: Use 'bool' data type in target_{step,resume}") Resolved by updating the corresponding data types throughout the codebase. Change-Id: I9574deeda754b2843b69b4afe80b293d4b357ddd Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>		2025-03-05 15:12:05 +03:00
..
board	Merge up to 26f2df80c3 from upstream	2025-01-22 17:47:14 +03:00
chip	tcl/chip/st/spear: fix syntax errors	2024-06-08 08:44:04 +00:00
cpld	cpld: update warning to suggest virtex2 refresh	2024-09-07 11:39:22 +00:00
cpu	tcl/arc: Fix ARC v2 registers r22/r23	2023-09-02 10:40:34 +00:00
fpga	pld/intel: remove idcodes from intel.c	2024-06-15 14:25:05 +00:00
interface	Merge up to a510d51a78 from upstream	2025-01-28 22:13:08 +03:00
target	Merge up to a168c63412 from upstream	2025-03-05 15:12:05 +03:00
test	tcl: add SPDX tag	2022-06-24 21:54:12 +00:00
tools	tcl/tools/test_cpu_speed: Fix register name	2023-03-18 21:59:47 +00:00
bitsbytes.tcl	tcl: add SPDX tag	2022-06-24 21:54:12 +00:00
mem_helper.tcl	tcl: add SPDX tag	2022-06-24 21:54:12 +00:00
memory.tcl	tcl/memory: fix syntax errors	2024-06-08 08:42:34 +00:00
mmr_helpers.tcl	tcl: add SPDX tag	2022-06-24 21:54:12 +00:00