59 lines
1.7 KiB
INI
59 lines
1.7 KiB
INI
#
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# Texas Instruments XDS100v2
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#
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# http://processors.wiki.ti.com/index.php/XDS100#XDS100v2_Features
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#
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# Detailed documentation is available only as CPLD verilog source code
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# to the registered TI users.
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#
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adapter driver ftdi
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ftdi vid_pid 0x0403 0xa6d0 0x0403 0x6010
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ftdi layout_init 0x0038 0x597b
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# 8000 z - unused
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# 4000 0 > CPLD loopback (all target side pins high-Z)
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# 2000 z < !( cable connected ) (open drain on CPLD side for $reasons)
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# 1000 0 > EMU1_oe
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#
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# 800 0 > PWR_RST = clear power-loss flag on rising edge
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# 400 z < !( power-loss flag )
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# 200 z < nSRST
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# 100 0 > nSRST_oe
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#
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# 80 z < RTCK
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# 40 0 > EMU0_oe
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# 20 1 > EMU_EN
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# 10 1 > nTRST
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#
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# 8 1 > TMS
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# 4 z < TDO
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# 2 0 > TDI
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# 1 0 > TCK
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#
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# As long as the power-loss flag is set, all target-side pins are
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# high-Z except the EMU-pins for which the opposite holds unless
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# EMU_EN is high.
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#
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# To use wait-in-reset, drive EMU0 low at power-on reset. If the
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# target normally reuses EMU0 for other purposes, clear EMU_EN to
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# keep the EMU pins high-Z until the target is power-cycled.
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#
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# The LED only turns off at USB suspend, which is also the only way to
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# set the power-loss flag manually. (Can be done in software e.g. by
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# changing the USB configuration to zero.)
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#
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ftdi layout_signal nTRST -data 0x0010
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ftdi layout_signal nSRST -oe 0x0100
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ftdi layout_signal EMU_EN -data 0x0020
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ftdi layout_signal EMU0 -oe 0x0040
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ftdi layout_signal EMU1 -oe 0x1000
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ftdi layout_signal PWR_RST -data 0x0800
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ftdi layout_signal LOOPBACK -data 0x4000
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echo "\nInfo : to use this adapter you MUST add ``init; ftdi set_signal PWR_RST 1; jtag arp_init'' to the end of your config file!\n"
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# note: rising edge on PWR_RST is also needed after power-cycling the
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# target
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