The V3U SoC is unique in that it now has 8x CA76 and CR52, while the previous SoCs had CA57/CA53/CR7 . This can still be handled without too complex modifications to the gen3 configuration file, so add the logic to handle it there. Change-Id: I7ab33eacc1fd379d369988d3d6690d2e82346c7e Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/6314 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> |
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board | ||
chip | ||
cpld | ||
cpu | ||
fpga | ||
interface | ||
target | ||
test | ||
tools | ||
bitsbytes.tcl | ||
mem_helper.tcl | ||
memory.tcl | ||
mmr_helpers.tcl |