riscv-openocd/contrib
Tim Newsome c5dee66a71
Redo fespi flash algorithm (#384)
* WIP, rewrite of flash algorithm.

Just put all the flashing logic into the algorithm, instead of using an
intermediate format. This should reduce total data written while
flashing by about 9%, and also makes the code much simpler.

Change-Id: I807e60c8ab4f9f376cceaecdbbd10a2326be1c79

* New algorithm works.

Speeds up Arty flashing another 9%.

wrote 2228224 bytes from file /media/sf_tnewsome/SiFive/arty_images/arty.E21TraceFPGAEvaluationConfig.mcs in 86.784538s (25.074 KiB/s)
verified 2192012 bytes in 6.693336s (319.816 KiB/s)
8.66user 13.03system 1:33.91elapsed 23%CPU (0avgtext+0avgdata 12272maxresident)k

Change-Id: Ie55c5250d667251be141cb32b144bbcf3713fce4

* Fix whitespace.

Change-Id: I338d518fa11a108efb530ffe75a2030619457a0b

* Don't reserve so much stack space.

Also properly check XLEN in riscv_wrapper.S.

Change-Id: Ifa0301f3ea80f648fb8a6d6b6c8bf39f386fe4a6
2019-07-09 10:05:07 -07:00
..
libdcc From upstream (#286) 2018-08-20 14:55:30 -07:00
loaders Redo fespi flash algorithm (#384) 2019-07-09 10:05:07 -07:00
remote_bitbang From upstream (#286) 2018-08-20 14:55:30 -07:00
rpc_examples contrib/rpc_examples: add example for python3 2014-04-14 18:14:22 +00:00
rtos-helpers From upstream (#331) 2018-11-19 12:46:40 -08:00
xsvf_tools Move xsvf_tools and remote_bitbang to contrib/ 2014-03-29 07:55:43 +00:00
60-openocd.rules stlink: add support for STLINK-V3 2018-12-06 13:06:59 +00:00
coresight-trace.txt present CM3 Trace agenda 2011-01-09 21:14:57 +01:00
cross-build.sh cmsis-dap: add initial cmsis-dap support 2014-01-09 15:20:51 +00:00
gen-stellaris-part-header.pl flash: declare fixed arrays const 2014-02-06 22:17:51 +00:00
itmdump.c contrib/itmdump: add a hack to allow direct dumping of specific SWIT, fix timestamp 2015-04-16 20:25:30 +01:00