92b14f8ca9
Let the target algorithm be running in the background and buffer data continuously through a FIFO. This reduces or removes the effect of latency because only a very small number of queue executions needs to be done per buffer fill. Previously, the many repeated target state changes, register accesses (really inefficient) and algorithm uploads caused the flash programming to be latency bound in many cases. Now it should scale better with increased throughput. Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> |
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| .. | ||
| armv4_5_cfi_intel_8.s | ||
| armv4_5_cfi_intel_16.s | ||
| armv4_5_cfi_intel_32.s | ||
| armv4_5_cfi_span_8.s | ||
| armv4_5_cfi_span_16.s | ||
| armv4_5_cfi_span_16_dq7.s | ||
| armv4_5_cfi_span_32.s | ||
| armv7m_cfi_span_16.s | ||
| pic32mx.s | ||
| stellaris.s | ||
| stm32f1x.S | ||
| stm32f2xxx.S | ||
| stm32lx.S | ||
| str7x.s | ||
| str9x.s | ||