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3 Commits

Author SHA1 Message Date
Tim Newsome 91dc0c0c8e
Add SPDX tags for RISC-V files. (#513) 
Requested in http://openocd.zylin.com/#/c/5821/3

Change-Id: I95551a3311d8e128300bacdf463da7ab4edf29a0
 2020-08-24 15:43:03 -07:00
Tim Newsome 4f9e2d7171
Fix semihosting for multicore targets (#478) 
* WIP making semihosting work with -rtos hwthread.

Change-Id: Icb46f3eeedc1391e8fdc73c3ad8036f20267eb2e

* More WIP.

Change-Id: I670a6e1ba2a13a6ef2ae303a99559a16fdd1bbfb

* Fix halting due to a trigger.

Change-Id: Ie7caa8dde9518bcd5440e34cf31ed0d30ebf29ad

* Fix multicore semihosting without halt groups.

Change-Id: I53587e5234308ed2cc30a7132c86e4c94eb176c4

* WIP

Change-Id: I40630543b08d8b533726cb3f63aa60a62be8ef40

* Fix single core semihosting.

This was the last bug!

Change-Id: I593abac027fa9707f48b7f58163d7089574a0e28

* Fix whitespace.

Change-Id: I285c152970b87864c63803fae61312e5b79dfe6d
 2020-05-19 10:34:36 -07:00
Liviu Ionescu 08a814686d target/riscv: add semihosting support 
- use the semihosting_common code
- to enable it, use the same commands as for arm

Signed-off-by: Liviu Ionescu <ilg@livius.net>
 2018-06-12 18:21:01 +03:00