Commit Graph

10840 Commits

Author SHA1 Message Date
Erhan Kurubas 64f3f8877e
riscv: call debug_execution related events (#679)
Change-Id: Ice7cdc816f3e568a6ba2db8f9101903b8f7a08ce
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
2022-02-21 09:02:07 -08:00
Antonio Borneo 94e7535be8 .gitmodules: switch away from repo.or.cz
The host repo.or.cz is often offline, creating issues for cloning
and building OpenOCD from scratch.
Already 'jimtcl' developer has dropped repo.or.cz, triggering the
OpenOCD commit 861e75f54e ("jimtcl: switch to github").

Change also the link of the remaining submodules 'git2cl' and
'libjaylink' to their respective main repository.

Change-Id: Ib513237427635359ce36a480a8f2060e2fb12ba4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6834
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2022-02-19 14:33:08 +00:00
Tim Newsome 435a652236
Merge pull request #678 from riscv/invalidate-progbuf-cache
fix progbuf cache: invalidate it when needed
2022-02-15 10:27:16 -08:00
Ben McMorran 254883597f rtos: threadx: Add hla_target support for ThreadX
Tested with an AZ3166 dev board (which uses the STM32F412ZGT6) running
the Azure RTOS ThreadX demonstration system.

Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I44c8f7701d9f1aaa872274166321cd7d34fb1855
Reviewed-on: https://review.openocd.org/c/openocd/+/6829
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 20:25:20 +00:00
Tim Newsome 3473953724
Merge pull request #676 from erhankur/fix/riscv_remove_trigger_return_code
riscv: fix remove_trigger return code for unavailable hw bp slot
2022-02-14 09:00:12 -08:00
Antonio Borneo 37d506ae55 server: remove remaining crust from dropped eCos code
Commit 39650e2273 ("ecosboard: delete bit-rotted eCos code") has
removed eCos code but has left some empty function that was used
during non-eCos build to replace eCos mutex.

Drop the functions and the file that contain them.

Change-Id: I31bc0237ea699c11bd70921660f960ee406ffa80
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6835
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-02-14 15:13:34 +00:00
Tim Newsome 2c0a65baa2 Fix small memory leak.
See https://github.com/riscv/riscv-openocd/pull/672

Change-Id: Ia11ab9bcf860f770ea64ad867102c74b898f6b66
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6831
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 15:13:11 +00:00
Ben McMorran 7307fd0e3f gdb_server: Include thread name as XML attribute
Explicitly providing a thread name in the "thread" element produces
better thread visualizations in downstream tools like IDEs.

Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I102c14ddb8b87757fa474de8e3a3f6a1cfe10d98
Reviewed-on: https://review.openocd.org/c/openocd/+/6828
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 15:12:45 +00:00
Jacek Wuwer f998a2aaf1 Cadence virtual debug interface (vdebug) integration
Change-Id: I1bc105b3addc3f34161c2356c482ff3011e3f2cc
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6097
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 15:12:10 +00:00
Antonio Borneo 2a2636f138 doxygen: fix some function prototype description
Change-Id: I49311a643ea73143839d2f6bde976cfd76f8c67f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6830
Tested-by: jenkins
2022-02-14 15:11:21 +00:00
Tim Newsome 49c40a7529 target/riscv: revive 'riscv resume_order'
This functionality was lost in [1], which was merged as commit
615709d140 ("Upstream a whole host of RISC-V changes.").
Now it works as expected again.

Add convenience macro foreach_smp_target_direction().

Link: [1] https://github.com/riscv/riscv-openocd/pull/567
Change-Id: I1545fa6b45b8a07e27c8ff9dcdcfa2fc4f950cd1
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6785
Tested-by: jenkins
2022-02-14 15:10:56 +00:00
Antonio Borneo a11fe473ea helper/list: add list_for_each_entry_direction()
Use a bool flag to specify if the list should be forward or
backward iterated.

Change-Id: Ied19d049f46cdcb7f50137d459cc7c02014526bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6784
Tested-by: jenkins
2022-02-14 15:10:41 +00:00
Antonio Borneo 16cc853bcf target/smp: use a struct list_head to hold the smp targets
Instead of reinventing a simply linked list, reuse the list helper
for the list of targets in a smp cluster.
Using the existing helper, that implements a double linked list,
makes trivial going through the list in reverse order.

Change-Id: Ib36ad2955f15cd2a601b0b9e36ca6d948b12d00f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6783
Tested-by: jenkins
2022-02-14 15:10:10 +00:00
Jan Matyas 8274cc58c1 fix progbuf cache: another two cases for invalidation
Continuation of the previous patch. There are two more cases
when progbuf cache in OpenOCD shall be invalidated:

- When OpenOCD resets the debug module undergoes reset (dmactive=0),
  e.g. during target examination

- When the user manually performs that very same operation
  (via riscv dmi_write)

Change-Id: I53f8f08250eeedcbd55ab4361d5665370b063680
Signed-off-by: Jan Matyas <matyas@codasip.com>
2022-02-14 14:14:14 +01:00
Jan Matyas feb83b78b7 fix progbuf cache: invalidate it when needed
This commit relates to progbuf cache,
implemented in https://github.com/riscv/riscv-openocd/pull/381

Make sure the cache gets invalidated when the progbuf
contents change via other means. I've identified two
such cases where the invalidation is required:

1) When the user manually tinkers with the progbuf registers
   (TCL command "riscv dmi_write")

2) When program buffer is used as a scratch memory
   (scratch_write64())

Change-Id: Ie7ffb0fccda63297de894ab919d09082ea21cfae
Signed-off-by: Jan Matyas <matyas@codasip.com>
2022-02-14 13:02:56 +01:00
Tim Newsome bdce7319b7
Merge pull request #677 from riscv/gitmodules
.gitmodules: switch away from repo.or.cz
2022-02-11 13:19:02 -08:00
Tim Newsome c3a864cfd6 .gitmodules: switch away from repo.or.cz
Manually applying https://review.openocd.org/c/openocd/+/6834 (which
hasn't merged yet) since repo.or.cz is down often enough that it's
affecting development.

Change-Id: Idb337c799662f3e0fa72379c59c52a61a048044e
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-02-10 10:29:16 -08:00
Erhan Kurubas 9fe791ba4a riscv: fix remove_trigger return code for unavailable hw bp slot 2022-02-09 22:42:46 +01:00
Greg Savin f6ffede8b6
fix missing thread ID in stop reply when smp-configured hart (but not hart 0) single-stepped (#675) 2022-02-07 09:28:31 -08:00
Zoltán Dudás 5ab74bde06 semihosting: User defined operation, Tcl command exec on host
Enabling a portion (0x100 - 0x107) of the user defined semihosting
operation number range (0x100 - 0x1FF) to be processed with the help of
the existing target event mechanism, to implement a general-purpose Tcl
interface for the target available on the host, via semihosting
interface.

Example usage:
- The user configures a Tcl command as a callback for one of the newly
	defined events (semihosting-user-cmd-0x10X) in the configuration
	file.
- The target can make a semihosting call with <opnum>, passing optional
	parameters for the call.

If there is no callback registered to the user defined operation number,
nothing happens.

Example usage: Configure RTT automatically with the exact, linked
control block location from target.

Signed-off-by: Zoltán Dudás <zedudi@gmail.com>
Change-Id: I10e1784b1fecd4e630d78df81cb44bf1aa2fc247
Reviewed-on: https://review.openocd.org/c/openocd/+/6748
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-05 21:40:17 +00:00
Tim Newsome 7d91f639bb
Merge pull request #674 from riscv/from_upstream
From upstream
2022-02-04 08:47:50 -08:00
Tim Newsome 52ca5d198e
Ask the RTOS which target to set swbp on. (#673)
This lets the RTOS pick the "current" target, which matters if address
translation differs between threads.

Change-Id: I5b5510ab6a06621589c902f42a91562055817dc4
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-01-31 09:23:38 -08:00
Pavel Kirienko dbbac5f11d semihosting: use open mode flags from GDB, not from sys/stat.h
Values defined in sys/stat.h are not guaranteed to match
the constants defined by the GDB remote protocol, which are defined in
https://sourceware.org/gdb/onlinedocs/gdb/Open-Flags.html#Open-Flags.
On my local system (Manjaro 21.2.1 x86_64), for example, O_TRUNC is
defined as 0x40, whereas GDB requires it to be 0x400,
causing all "w" file open modes to misbehave.

This patch has been tested with STM32F446.

Change-Id: Ifb2c740fd689e71d6f1a4bde1edaecd76fdca910
Signed-off-by: Pavel Kirienko <pavel.kirienko@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:25:21 +00:00
Tim Newsome 6541233aa7 Combine register lists of smp targets.
This is helpful when you want to pretend to gdb that your heterogeneous
multicore system is homogeneous, because gdb cannot handle heterogeneous
systems. This won't always works, but works fine if e.g. one of the
cores has an FPU while the other does not. (Specifically, HiFive
Unleashed has 1 core with no FPU, plus 4 cores with an FPU.)

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I05ff4c28646778fbc00327bc510be064bfe6c9f0
Reviewed-on: https://review.openocd.org/c/openocd/+/6362
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:25:06 +00:00
Julien Massot 93f2276cdd aarch64: support for aarch32 ARM_MODE_UND
Fix:
unrecognized psr mode: 0x1b
cannot read system control register in this mode: (UNRECOGNIZED : 0x1b)

Change-Id: I4dc3e72f90d57e52c0fe63cb59a7529a398757b3

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Change-Id: Ifa5d21ae97492fde9e8c79ee7d99d8a2a871b1b5
Reviewed-on: https://review.openocd.org/c/openocd/+/6808
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:20:48 +00:00
Hans-Erik Floryd 5e0cc43838 tcl/board: Add EVB-LAN9255 config
Config for EVB-LAN9255, tested using Atmel-ICE debugger on J10
connector.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: I8bcf779e9363499a98aa0b7d10819c53da6a19e7
Reviewed-on: https://review.openocd.org/c/openocd/+/6812
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:20:07 +00:00
Hans-Erik Floryd efb0b116da flash/nor/atsame5: add LAN9255 devices
Support Microchip LAN9255 devices with embedded SAME53J MCU.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: Ia811c593bf7cf73e588d32873c68eb67c6fafad7
Reviewed-on: https://review.openocd.org/c/openocd/+/6811
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-29 18:18:53 +00:00
Tim Newsome b6fabdd429 Merge branch 'master' into from_upstream
Change-Id: I61e24edbdeceddba265514fd7e0a489ec23e2a4c
2022-01-28 09:40:43 -08:00
Tim Newsome 6f3daf38c7
Fix small memory leak. (#672)
Change-Id: Ia11ab9bcf860f770ea64ad867102c74b898f6b66
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-01-27 10:00:06 -08:00
Adrien Grassein 666ff828b2 jtag: Add an option to ignore the bypass bit
Some CPU wrongly indicate the bypas bit in the codeid.
It's the case of the NanoXplore NG-ULTRA chip that export a
configurable (and potentially invalid) ID for one of
its component.
Add an option to ignore it.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Change-Id: Ic59743f23bfc4d4e23da0e8535fec8ca9e87ff1a
Reviewed-on: https://review.openocd.org/c/openocd/+/6802
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2022-01-22 10:20:17 +00:00
Antonio Borneo e3bda57982 target: use target_event_name()
We have the API target_event_name().
Use it to improve code readability.

Change-Id: Ic48d2227bdefe9af05aff99a871a45e0612e5254
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6790
Tested-by: jenkins
2022-01-22 10:19:48 +00:00
Antonio Borneo 492ac453ab log: fix memory leak when log to file is enabled
When log to file is enabled, the file is not closed by OpenOCD at
exit. This is reported by Valgrind as a memory leak that is still
reachable, as the internal buffers of 'FILE *log_output' are freed
by the automatic fclose() at exit.

Close the log file before exit.

Change-Id: Id472c0d04462035254a9b49ecb0a4037263c6f6f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6789
Tested-by: jenkins
2022-01-22 10:15:48 +00:00
Antonio Borneo 1536e249f2 aarch64: dump a message when CTI is missing
If the CTI is not specified OpenOCD fails target's examination
without indicating the reason.

Drop an error message about the missing CTI.

Change-Id: I344537fb21cf38785796ba938e71890e04135509
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6788
Tested-by: jenkins
2022-01-22 10:15:01 +00:00
Antonio Borneo 5a8d32fcb9 doc: use the new jimtcl syntax for 'expr'
With jimtcl 0.81 the syntax of the TCL command 'expr' requires the
multiple arguments to be within curly brackets.

Update the examples in the documentation to follow the new syntax.
While there, split one example to avoid it to exceed the line size
during pdf document generation.

Change-Id: I91cca419f8273415ccb0c2ce369fc6ac476e34e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6809
Tested-by: jenkins
2022-01-22 10:13:36 +00:00
Doug Brunner aad8718058 flash/nor/efr32: fixed lockbits and user data
Changed flash driver to support writing to the user data page, as well as to any portion of the lockbits page above 512 bytes (the amount used for the actual page lock words). The top part of the lockbits page is used on at least the EFR32xG1 chips for the SiLabs bootloader encryption keys.

As presented to the user, the lockbits page is the same size as the other pages, but any attempt to write to its low 512 bytes is an error. To enforce this, efr32x_write is renamed to efm32x_priv_write and a wrapper function is provided in its place. If the user erases the lockbits page, the driver rewrites the cached lock words after the erase. When the driver erases the lockbits page in order to update the lock words, it first takes a copy of anything stored in the top part of the page, and re-programs it after the erase operation.

There are now multiple instances of flash_bank for each target, and the flash_bank instances must share their cached lock words to operate as intended. Therefore, when a bank is created, the global flash bank list is used to find any other banks that share the same target. Since some banks in the global list are invalid at the time free_driver_priv is called, reference counting is used to decide when to free driver_priv.

To avoid the need to find the lockbits flash_bank from another flash_bank, efm32x_priv_write and efm32x_erase_page now take an absolute address.

There didn't seem to be any reason to prohibit unprotecting individual flash pages, so that limitation is removed from efm32x_protect().

This addresses ticket #185.

Valgrind-clean, except for 2x 4kiB not freed/still reachable blocks that were allocated by libudev.
No new Clang analyzer warnings, no new sanitizer warnings.

Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: Ifb22e6149939d893f386706e99b928691ec1d41b
Reviewed-on: https://review.openocd.org/c/openocd/+/6665
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-05 17:57:08 +00:00
Tim Newsome cc0ecfb6d5 Merge branch 'master' into from_upstream
Conflicts:
	doc/openocd.texi
	src/flash/nor/fespi.c

Change-Id: Iaac61cb6ab8bba9df1d4b9a52671a09163eb50b2
2021-12-28 10:45:40 -08:00
Tim Newsome d27d66bc1b Document how vector registers are exposed to gdb.
See https://github.com/riscv/riscv-openocd/pull/570

Change-Id: Ie7cdef3717e107a9df0b48316cfbc547dea9a7fd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6776
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-24 15:13:14 +00:00
Marc Schink 0cbb0c3ccc contrib/udev: Add missing J-Link USB PID
See libjaylink/contrib/99-libjaylink.rules

Change-Id: I36733e18eb4bc11828c5fa563c687d28be9e34bd
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6778
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-24 15:12:39 +00:00
Tim Newsome 3ba21e5f00 target/riscv: calloc() memory per register.
This replaces a static array with 8 bytes per register. When there are
vector registers larger than 8 bytes, they would end up clobbering each
other's values. I can't believe I didn't catch this earlier.

See https://github.com/riscv/riscv-openocd/pull/658

Change-Id: I9df4eaf05617a2c8df3140fff9fe53f61ab2b261
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6775
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-12-24 15:10:20 +00:00
Antonio Borneo 9828c0a440 semihosting: use macro COMMAND_HANDLER
We have the macro
	#define COMMAND_HANDLER(name) \
		static __COMMAND_HANDLER(name)
Use it!

Change-Id: I0e5385cb54197c743348f0d2ce215c93b8e396a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6786
Tested-by: jenkins
2021-12-24 15:07:26 +00:00
Antonio Borneo 5795f4d3ef gdb_server: fix a comment in gdb_new_connection()
On 2008-03-05, before git's age, commit 6d95014674 adds a
comment about unobserved ACK supposedly sent by GDB at connection.

The ACK is sent since GDB 3.95 (1999-05-04), but a bug introduced
in GDB 6.5 (2006-06-21) and fixed in GDB 7.0 (2009-10-06) makes
GDB sending the query for "supported packets" before sending the
ACK. Due to the bug, the author of the commit failed to see the
ACK.

Change-Id: I574a8013e7d159d1c71087af83b7c2ce92be86bd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6769
Tested-by: jenkins
2021-12-18 17:26:36 +00:00
Antonio Borneo 29e689ede6 openocd: add keep_alive during command sleep
The command sleep holds the host CPU until it completes.
Send keep_alive to GDB, so it will not timeout.

Change-Id: I92e9c5fc871b4e6a7695cdc449ca9fb3c1f1d9ec
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6770
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
2021-12-18 17:23:34 +00:00
Tomas Vanek 33fa237b2f target/cortex_m: minor refactoring in cortex_m_store_core_reg_u32()
Unlike cortex_m_load_core_reg_u32() storing core register uses
the same code pattern around DHCSR read as offered by the convenience
helper cortex_m_read_dhcsr_atomic_sticky().

Use the helper.

Change-Id: Ia947204944a8b549f3c2be7fb2f717aad18970c4
SeeAlso: 65d7629183 (cortex_m: poll S_REGRDY on register r/w)
SeeAlso: 0dcf95c717 (target/cortex_m: cumulate DHCSR sticky bits)
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6767
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-18 17:23:04 +00:00
Tomas Vanek 1e07079dee jtag/drivers/vsllink: fix memory leak
Close libusb context in vsllink_quit()

Change-Id: I85da8d7228b1b2b033a32b2f9ae9ed0726546b55
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6766
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-18 17:22:24 +00:00
Tim Newsome 54c951d7f7
Handle changed `ftdi` syntax. (#670)
Also rename ftdi_oscan1_mode command which only exists in our branch.

Change-Id: Ie9b28f228b1fd984244edb8162d552104d28e462
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-12-14 10:03:24 -08:00
Tim Newsome 37683df05e
Merge pull request #669 from riscv/build_oscan1
--enable-ftdi-oscan1 in Linux build.
2021-12-13 13:57:38 -08:00
Tim Newsome f3c69c7292 Don't use oscan1 on 32-bit build.
It requires libusb, and I'm not off-hand seeing a 32-bit libusb to link
with.

Change-Id: Ib676982b9c17369326ffc63eab5ef895add48569
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-12-13 13:36:06 -08:00
Tim Newsome deab0f4638 Also install the library itself.
Change-Id: I86579f6f5abeecf6b85ccbc6c736cc7aa0922a16
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-12-13 13:32:22 -08:00
Tim Newsome 26c9e64d3d Install libusb
Change-Id: I711c814ff3c9d4fada58aac530e406df662024a4
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-12-13 13:28:53 -08:00
Tim Newsome 8599254e29 --enable-ftdi-oscan1 in Linux build.
Change-Id: I531cd283a1020d94eaeee36e81140c8c4801c69e
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-12-13 13:25:09 -08:00