disable asynchronous callbacks and reads as minidriver requires
reads and callbacks to be synchronous.
Could possibly be fixed by some design work.
Change-Id: I7ca79a551085b2e8ba6928e1762d1baed6e95d4b
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/260
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
jlink modified to use the new usb abstaction layer.
During the configuration process we can select if use
libusb0 or libusb-1.0 library for this driver.
Change-Id: I70bc9ee2f89b7597e0f64ea80cad7f1b9070f01b
Signed-off-by: Mauro Gamba <maurillo71@gmail.com>
Reviewed-on: http://openocd.zylin.com/236
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Handle default case of single DDR chip
Propagate global variable for multi DDR chip
Change-Id: I315380f91ee7fcc2976437aa5836d88a7964fc9d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/251
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Lets be consistent and use strndup to allocate the debug buffer.
Change-Id: I535ad270ebfeae6e09d28372ab3749c822971223
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/245
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Commit 1794e5ee54 renamed the file to
have all lowercase characters according to most references to the
file, but the commit didn't change the existing reference to the
old filename.
Change-Id: I380e52e947a8091d48cf010e3919bf2caed7fdff
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/248
Tested-by: jenkins
Before this patch, at91sam3u4c.cfg includes "at91sam3uxx.cfg" which
doesn't exist - the filename was at91sam3uXX.
However, many operating systems have case sensitive file names!
Change-Id: I8b2f987f1f4214269b80ef5cba8177ce05ad90b6
Signed-off-by: Harald Welte <laforge@gnumonks.org>
Reviewed-on: http://openocd.zylin.com/247
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Compile error is encountered when _DEBUG_GDB_IO_ is set,
due to duplicate variables.
Fixed by renaming the variable.
Change-Id: I729c06e317fdb899142c9ceaf543b7f580088807
Signed-off-by: James Zhao <jamzhao@gmail.com>
Reviewed-on: http://openocd.zylin.com/243
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Add a test if the pointer to the target_init function in the target struct
is set before the function pointer is used.
Change-Id: Ie4ea542f64f35efce8c5bce2ced9b881bf283ec1
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/241
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
when last==first==0 then mass erase is executed, it's faster.
the page marking was wrong in this case.
Change-Id: I5c579d59b5c4778cf057cb5986e086abdd4209b2
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/232
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
the flash module clock was set according to a spreadsheet from freescale, now it's set according to the configuration file used by the Freescale Flash Programmer.
both work, but i think it's better to use the one used by a software that's made by Freescale (should be correct...)
Change-Id: I382197a3eb43dd47ff4b9b83d5e05008d5613fc6
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/223
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
the unlocking procedure erases the flash mem (even if it wasn't locked), so it should be marked as erased after unlocking.
Change-Id: I5cc6a1e1d6cf4e1f243de532eff54111ffd66187
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/222
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
if JTAG debug request fails then halting with a reset should be attempted.
the failure was ignored previously.
Change-Id: Ibec08e2e97f962d164a110c21aaa80bfc17b7f1a
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/221
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
i had assumed two possible halt/debug states:
- halted + debug mode
- running + not debug mode
turns out this one also exists
- halted + NOT in debug mode
added code to handle this in an appropiate way.
Change-Id: Ia0ddcd55d1890c90d100a9e6f5e84ed8dda812a3
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/220
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
now the flash algorithm running on the 568013 checks the buffer_empty bit (instead of the command_finished bit) before trying to write a new word to the flash mem.
this should speed up the flashing procedure. since it is open loop, this change may reduce the risk of failure. flashing will fail if JTAG speed is such that the flash module cannot keep up.
also, the USTAT register is only read once, as suggested in the flow chart provided by freescale (per. ref. manual @ 6-11)
the last step of the flow chart, exiting after commands are complete, is not implemented.
the algorithm will stay waiting for more data. it is up to the PC side to *not* send more data.
Change-Id: I47fe4b50de7da85f80868f5986a89a7e2152616c
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/219
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
moved reset_jtag to the top, since it will be needed in future changes.
also send a define to the .h
Change-Id: I53ef9c02ffa70e7d0416364525a6fbfef855e222
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/216
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
added logging of target error codes to enable automatic error handling from tcl.
the plan is to use a computer to execute a series of tcl commands, the changes allow simple parsing of return messages to detect errors.
Change-Id: Ia98d3bd036e1b6065b475ffff6c1d30baeaf7417
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/215
Tested-by: jenkins
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This fixes an issue when init is called before init_targets has been
executed.
Make sure init_targets is called before init.
Change-Id: Icd5bd4c2a8eea2e399d9de4e331a77560e9672ac
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/235
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Fix error introduced in recent commit.
Correct the name of the board file.
Change-Id: I46bca8329812fb24bc4f8d316be9e7cba9b56496
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/234
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Initial support for SPEAr320 chip and for evaluation
board named EVAL_SPEAr320CPU.
Change-Id: I85524655769bcc610294a26db47a7a399256fbb7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/231
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Initial support for SPEAr300 chip and for evaluation
board named EVALSPEAr300.
Currently supports only those parts in common with
SPEAr310.
Change-Id: I8075aa721cf3dfaac561ee51e5df4ce9a2992e3e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/230
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code to autodetect DDR was wrong and not complete.
Replaced with a parameter passed to TCL proc.
Split DDR configuration in the two cases of single and
dual DDR chip, using single chip as default.
Change-Id: If39aa518670398e8e4f207d7db6e812a49743e15
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/229
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
DDR controller activation should not be in DDR chip
specific code, but in generic DDR controller part.
Change-Id: If1b178228352b48b0097d7b9b300005fb5bb4fb6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/228
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The support for SPEAr3xx family members does not require
dedicated files for each member.
Join the initialization scripts in a single file.
Change-Id: I45e9dc64809a6f52c4592e3e0eef5529394887c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/227
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The initialization of RAS enable and clock is required by
all SPEAr3xx devices
Change-Id: Iea4cd0902e4da219475d7f35b4c25fc87ec6b902
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/226
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The initialization of memory port 1 is required by
SPEAr310 only
Change-Id: I9d655da1026795f02ff2f82aed36441068cf266d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/225
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
ST-AN was mentioned but there was no reference
Change-Id: Ie065f8faba94d63cf391a994ec895692d499394e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/224
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The configuration script check for libusb-1.0 availability first and only
if not found check for libusb-0. So if both libraries are installed on the
system the build script will use libusb-1.0
It's possible to force compiling with libusb-0 with the --enable-libusb0 switch.
If the driver support only libusb0 the script check anly for it.
Change-Id: I7eb045d4e2bd553abefad53f3f4023ff46b0f5f6
Signed-off-by: Mauro Gamba <maurillo71@gmail.com>
Reviewed-on: http://openocd.zylin.com/33
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This reverts commit 0ef5a90d93c5a026bcf70132e60e957ae339d1e1
Causes older versions of gcc to break - need to look into a better fix.
This passed through the jenkins build as we originally did not build this module - we do now.
Change-Id: Iafeac8442b2249269ff45a52ccd3e2870920f635
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/214
Tested-by: jenkins
fix issue when using tms_sequence short
see Trac #31
Change-Id: I22a9cd2af59eae4d8a276dae60b6a99d05af53bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/201
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The calculation for reg_packet_size in gdb_get_registers_packet() could
generate a wrong result in the case of multiple registers whose size is
not a multiple of 8.
The current calculation sums the sizes for all registers then rounds the result
up to the next multiple of 8.
Instead it should round each register size up individually and sum the results for all registers.
Change-Id: Idfb5e5eeee0e69a6889dbe9769c0bf17feacb63b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/200
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
gdb_memory_map() correctly calculates the target specific number of flash banks, but then uses the total number (all targets) instead of the target specific number to construct its GDB response, causing a crash.
Change-Id: I3f8639b3e90303a59753ebe140ce4fff96fd5db0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/199
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Dean Glazeski
Øyvind Harboe
Mauro Gamba
rodrigo_l_rosa
Antonio Borneo
Andreas Fritiofson
Spencer Oliver
Peter Stuge
Harald Welte
James Zhao
Mathias K
Evan Hunter
Robert Pasz
Philip Nye