Topaz reports on http://sourceforge.net/p/openocd/tickets/87/ that
protection level constants are mixed up. This leads to device ending
up in protection level 1 after mass erase.
Additional work is required to actually put the device in RDP Level 1
and then back to Level 0, as Option bootloader launch is a special
kind of full target reset.
To be able to flash properly after mass_erase a "reset init" is needed
(it's anyway recommended to always perform it before any flash
operation).
Change-Id: I9a838909458039bb0114d3019723bf134fa4d7c9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2490
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The mass erase for STM32L was lack because the procedure is more complex
than the procedure for the STM32F4xx.
The reference manual RM0038 (L100 subfamily) page 79 is more accurate
than the reference manual for the STM32L0xx. On the L0, the mass-erase
erase also the EEPROM. This is a limit to mass erase on L0.
The mass erase procedure is a command of telnet interface.
Tested on Discovery L053 and Discovery L100.
Change-Id: I6a1d7a3669789aea89c59a006ab2d883f3d827ca
Signed-off-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-on: http://openocd.zylin.com/2319
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It's possible for us to fail to read the part ID code so make sure that
part_info is initialized to NULL before attempting to do so, otherwise
we could proceed and use it uninitialized and then segfault.
Change-Id: I0a3f3d3947690b66f0981b5046340449521e0b33
Signed-off-by: Jack Peel <jack.peel@synapse.com>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2276
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds initial support for the STM32L0 family, specifically the ID
code 417 variant. The 'L0 has 128B rather than 256B pages as well as a
different number of pages per sector. It also has several key registers
and register sets in different locations from the STM32L1xx parts.
This change therefore takes the opportunity to reorganize part information into
a const table (it was previously determined by a set of control statements) and
abstracts away some of the low-level details to make them generic for L1 and
L0 parts.
We also include the first bank's size (for dual bank parts) in the new
device information table (and correct that size for the 0x437 variant
which is 256 rather than 192KB).
The 'L0 parts will not use the built-in loader/helper for Flash writing.
Tested on STM32L053 (dicovery board and Nucleo board) and STM32L152
(discovery board).
Change-Id: I57f7a8ab02caee266de71b31ae82a50d85728a0b
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2200
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Commit 2493671e2d added a default flash
padded value to the wrong file, should have been stm32lx.c not stm32f1x.c.
Change-Id: Idab634a03ccb28609cc977a92ac2b138d1e8d859
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1833
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add device ID 0x437, a dual-bank part with 512KB total. This one used
the Medium+/HD flash size register to read the flash size in Kb rather
than the 0/1 code in the Medium+ parts.
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Change-Id: I870fe3bb1b473939b7211c3b2edb44b4b3643648
Reviewed-on: http://openocd.zylin.com/1790
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This eliminates most of the warnings reported when building for
arm-none-eabi (newlib).
Hsiangkai, there're many similar warnings left in your nds32 files, I
didn't have the nerve to clean them all, probably you could pick it
up.
Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1674
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Unfortunately the Medium+ density and 0x436 devices have their F_SIZE register
at a different location: 0x1FF800CC instead of 0x1FF8004C. Fix this for
the 0x427 Medium+ devices and also the 0x436 devices. Furthermore, for
0x436 devices the flash size is reported as a 0 or 1 code rather than
the size in Kb. Please see RM0038 r8 or newer for an explanation, as
noted in the comments.
Change-Id: Ie03b1e119a61f2a854bc2ccc5f90ce3e8852e272
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1522
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Uppercase device/family names and change them to be more specific and
consistent across all STM32 families.
High-density STM32F10x has a Rev Y according to RM0008 Rev 14, so add
it.
I have a STM32F30x Rev Y, sitting on my desk, but it isn't described in
the reference manual. Add it as well.
Split the STM32L1xx Medium+ Density devices based on ID, to match the
reference manual. If I read it correctly, the Medium+ devices have
different revision mappings depending on their package/device ID. I have
no real devices to examine, however.
Change-Id: I5b95e5fa3cdeba219aa96838ea06ec1bb62bd921
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1497
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Factor out common bit masking and printing code and use intermediate
strings to avoid buffer size handling.
Change-Id: I7d8c12df11ade6cdca8c917b5524372daa498bf4
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1496
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These chips are capable of reading the flash registers while they're
running.
Change-Id: I76b90b2bae1aa79b5a063b2073faa5d3ed93cfd7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1495
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The device was correctly used in stm32lx_probe but missing from stm32lx_get_info.
Change-Id: If288b8df3210a945e727e4e27cfbdb948db32fc7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1491
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
This fixes an issue if the device is manually probed after the initial probe
fails due to being unable to read flash size register. In this situation the
driver assumes the user has overridden the flash size when infact this may
not be the case.
It also seems on the older stm32f1 devices the flash register is not readable
when locked, this does not seem to apply to the newer parts - f0, f3, f4.
Change-Id: I125f872fcb2d962ca6705f97b62d957e2b31303b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1187
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Added support for new ST devices in the stm32lx portfolio, with device
id 0x427. These have 256k flash, but in a single bank compared to
device id 0x436 which is a dual bank flash.
Change-Id: Iafdfe990f24bd04b0d6e00385ee70690f3bf8d5f
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an
image that was larger than 192Kb. That lead to openocd printing out two error messages like
"Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx
driver tried to write half pages which overlapped into the next flash bank.
A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices).
A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly.
Change-Id: I69e25131983d88613be8606b438f98870c5f1e52
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It has been seen on some stm32 targets that the flash size register that
is probed by the driver may contain an invalid size.
This change enables the user to override the probed value.
Change-Id: I09359e59a96f9133d3d939670957d32a830a944e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1132
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
This makes sure we are using privileged mode when executing any loaders.
Change-Id: I18bf32ec92e1c76a66ab25e3712652bc3650b332
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1108
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
To simplify things change over to using the generic core_mode struct rather
than maintaining a armv7m specific one.
Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/966
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
An issue has been seen with the stm32lx flash driver that if a
power cycle/reset is applied after a erase, any ram loader will Hard Fault
on execution.
A similar issue is mentioned in the errata for the device.
Two solution's seem to workaround this issue:
1, Handle the exception, this means adding exception vectors to the loader
and changing the exception address using nvic vtor register.
2. falling back to using slower direct page writes - approx 50% slower.
Using solution 1 would mean restrictions are placed on the loader location.
Solution 2 was chosen mainly as it was simpler too implement.
Change-Id: I429f06b5a3e3b1d8de90071a88a7df11fc9b46a7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1010
Tested-by: jenkins
Waiting 20secs is a bit much excessive, we could probably reduce to 5.
Change-Id: Iffb97adb99c2541a075fe78dbc88a53ddf340214
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1009
Tested-by: jenkins
Handle any leading bytes upto the next 128 byte page, enabling us to safely
use the faster page write.
Rather than use a separate word/byte write to program any trailing bytes
we use a combined write function.
Use memcpy for byte writes and change loader to using bytes.
Change-Id: Ie0164a30388f018dd00e752cf5ff87d4f96ced97
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1008
Tested-by: jenkins
The current stm32lx driver will fail if no working area is
provided - fallback to using slow writes if this is the case.
Change-Id: I92b1535fec4aebc855c63ce2c54b10f168f3c07e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1007
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Working area pointers shouldn't be re-used, so there's no point in storing
them in the flash bank struct. Make all such pointers local.
Change-Id: Iab65b4e8b475fed7fc72fb8928f54590fa69d260
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/865
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Remove a lot of the repetitive code in stm32f1x flash probe by converting
the large if-selector to a switch, moving the common checks outside it and
concentrating the failure handling to a single point.
Do the same with stm32f2x and stm32lx for consistency.
Change-Id: Ic0ecfb1533c49f5d2108cda5fd20c8372d7c71ef
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/746
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Some variants read 0 for the flash size register, rather than
failing lets assume we have max flash fitted.
Change-Id: Ie1fb4e73606f49268a6fd5921c3aef75bc4790d3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/744
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Rather than failing if the flash size reg cannot be read lets assume
we have the max flash size fitted.
It is quite common on early ST silicon to not correct support this register.
Change-Id: Ife058d60ae0027faad2c929ebd5b7fe2ef27234d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/743
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Revision X is not mentioned in the latest RM0038 rev5, however it has been
confirmed correct by ST using ST-LINK Utilty.
Change-Id: I65210e512ea25818a1d0d3b223502ebd7535b29d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/742
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The target address for the partial data needs to be bumped past the
full page data. Otherwise, the partial data overwrites the start of
the flash block.
Change-Id: I1246b2fa8acbdb8193edcf7029309f11d1c6069c
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/555
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Currently stm32lx flash driver will remove the readout protection if set
during a probe.
This may not be what the user wants, so let them decide.
Change-Id: I8575e3b339b10a4f7bac57cca9586dcab513d347
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/465
Tested-by: jenkins
The stm32 drivers have been using 0x7ff as the DEV_ID mask, this should
have been 0xfff.
Change-Id: I232469620969d6dd1b9a2a2aa15ec18b947dbb05
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/352
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
There is no need to use a while loop here. This patch simple copy
the last bytes with the system function.
Change-Id: Ibda72dca449746efeba5a1af2e45c5990f9cf347
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/364
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
On wrong parameters a error is signalized to the calling function.
Change-Id: I484443fdb39938e20382edc9246d5ec546a5c960
Signed-off-by: Mathias K <kesmtp@freenet.de>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/282
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Paul Fertser
Rémi PRUD'HOMME
Andrey Yurovsky
Andreas Fritiofson
Spencer Oliver
Johan Almquist
Mathias K
Clément Burin des Roziers