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3 Commits

Author SHA1 Message Date
zwelch 86e4324f1b Finish transforming 'u32' to 'uint32_t'. 
- Replace '\([^_]\)u32' with '\1uint32_t'.
- Replace '^u32' with 'uint32_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2281 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-18 07:11:11 +00:00
zwelch c18947b947 Transform 'u8' to 'uint8_t' 
- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2276 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-18 07:07:12 +00:00
drath e9297b40b9 - added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration 
- added support for loading .bit files into Xilinx Virtex-II devices
- added support for the Gateworks GW16012 JTAG dongle
- merged CFI fixes from XScale branch
- a few minor fixes


git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2006-11-22 13:03:10 +00:00