Commit Graph

9 Commits

Author SHA1 Message Date
Luca Ellero fa93174a56 arm_adi_v5: add/move apsel member in struct adiv5_dap
This patch tries to make some order in "apsel" mess.
"dap apsel" command was quite useless (and broken) by itself.
With this patch we can use it to select between AHB or APB memory access
(previous patch 05ab8bdb81 was somehow broken).

- moves member apsel (in struct adiv5_dap) to ap_current
- adds apsel member

this strange choice is made trying to keep coherence in "dap apsel" command
 and to keep compatibility with other code (for example cortex_a8).

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-17 09:28:07 +01:00
Luca Ellero 779005f43d cortex_a9: move dap_ap_select to arm_avi_v5
dap_ap_select was used in the code at various points, but that can lead to
confusion, without any knowledge of what AP is really selected at some
points.
Some bugs derive from this (for example md/mw doesn't work well after
issueing "dap apsel" command).
Moving it to arm_adi_v5.c (using  mem_ap_sel* functions instead of mem_ap_*)
make the code more clear and more easier to maintain.
In the future it should be made "static" to avoid its use outside arm_adi_v5

One further benefit is the various goto has been removed as well

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero aaa52e16ce cortex_a9: check if MMU is enabled on APB read/write memory
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero f609d03f1f cortex_a9: check target halted on APB read/write memory
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero 28b953d0bd cortex_a9: trivial fixes
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero 05ab8bdb81 cortex_a9: implement read/write memory through APB-AP
This patch adds read/write capability to memory addresses not
accessible through AHB-AP (for example "boot ROM code").

To select AHB or APB, a "dap apsel" command must be issued:
dap apsel 0 -> following memory accesses are through AHB
dap apsel 1 -> following memory accesses are through APB

NOTE: at the moment APB memory accesses are very slow, compared
      to AHB accesses. Work has to be done to get it faster (for
      example LDR/STR instead od LDRB/STRB)

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-10 10:07:56 +01:00
Aaron Carroll 94e90cbf16 cortex_a9: fix dap_ap_select() usage
Save, select and restore AP in cortex_a9_step and cortex_a9_init_debug_access.
Fixes a bug where the wrong AP is selected after a reset.

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-02-10 09:57:17 +01:00
Luca Ellero d51b561b10 cortex_a8/a9: fix some comments
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-08 09:42:43 +01:00
Aaron Carroll c34e69cb10 cortex_a9: add source files for Cortex A9 support.
add target and build support for A9

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:57:38 +01:00