interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
6,439 Commits 69 Branches 14 Tags 91 MiB
Commit Graph

4 Commits

Author SHA1 Message Date
Spencer Oliver 85c0375337 cfg: increase stm32f0 default working area 
The smallest stm32f0 has 4k sram, so use this as the default.

Change-Id: I9097be9608da92b1b9da504e5bacc1280c86907a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/603
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
 2012-05-08 14:05:11 +00:00
Spencer Oliver 8002ed268d cfg: allow stm32discovery parameter override 
This enable the user or board config to override the parameters
passed to stm32_stlink.cfg.

Required to fix a incorrect working area bug with the stm32vldiscovery.

Change-Id: I40a4f7913ff37d577d44b1f23befccf0317080a1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/597
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
 2012-04-30 13:06:29 +00:00
Jonathan Dumaresq 445770c081 Fix Typo in cfg file 
Change-Id: Id91ef70988212185f9ec653cbf5dc4e1defb1b9e
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/464
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
 2012-02-17 14:02:50 +00:00
Jonathan Dumaresq b0ef9cf117 Add stm32f0x target 
Change-Id: I4abfef4459b7e2780d17bdd7623fd1ef797cc8ea
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/437
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
 2012-02-16 08:56:18 +00:00