riscv-openocd

Commit Graph

Author	SHA1	Message	Date
Andreas Färber	9728ac3fba	armv4_5: Integrate build of checksum code Add rules to build armv4_5_crc.inc, and convert the code to target endianness the least intrusive way. Change-Id: I7452b2c7e679dae14f9cda5f89bc81c16fc12cad Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3473 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins	2016-05-22 15:51:15 +01:00
Andreas Färber	e0ba93d018	armv7m: Integrate build of checksum code Add rules to build armv7m_crc.inc and include it via preprocessor. Change-Id: I4482c7acb8454de28bdf210d9f06c0720ada490a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3474 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>	2016-05-22 15:49:51 +01:00
Spencer Oliver	08d4411b59	update files to correct FSF address Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>	2013-06-05 19:52:42 +00:00
Spencer Oliver	1b0c22dd56	armv7m: update crc/erase_check loaders for cortex-m0 Use loaders that have been built for cortex-m0, making them usable for both cortex-m0 and cortex-m3 families. Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/604 Tested-by: jenkins	2012-05-14 09:27:20 +00:00
Spencer Oliver	7351eecf6a	loader: update loader src for armv7-m arch Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>	2011-01-06 10:35:02 +00:00
Spencer Oliver	1fafb669c9	contrib: add ram loader src code Add src code for ram loaders to contrib directory. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>	2010-10-28 09:19:37 +01:00

6 Commits