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6 Commits

Author SHA1 Message Date
zwelch db7e77237c Transform 'u32' to 'uint32_t' in src/target/arm* 
- Replace '\([^_]\)u32' with '\1uint32_t'.
- Replace '^u32' with 'uint32_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-18 07:08:52 +00:00
zwelch 86173cdbdd Transform 'u8' to 'uint8_t' in src/target 
- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-18 07:04:08 +00:00
ntfreak f7d3fdb195 - add support for different TAR autotincrement sizes as per ARM ADI spec. 
- set TAR size to 12 bits for Cortex-M3.
- Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu].


git-svn-id: svn://svn.berlios.de/openocd/trunk@2051 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-04 13:45:50 +00:00
ntfreak 7dc29156fe - change signature for adi_jtag_dp_scan and adi_jtag_dp_scan_u32 to use swjdp_common_t *swjdp instead of arm_jtag_t *jtag_info 
- change SWJDP_IR/DR_APACC to DAP_IR/DR_APACC to conform with ARM_ADI docs.
- add swjdp->memaccess_tck field and code for extra tck clocks before accessing memory bus
- Set default memaccess value to 8 for Cortex-M3.
- Add dap memaccess command.
- document all armv7 dap cmds.
- Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu].

git-svn-id: svn://svn.berlios.de/openocd/trunk@2005 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-06-02 21:06:12 +00:00
mlu a644bc11a5 Added dap baseaddr and dap apid commands 
git-svn-id: svn://svn.berlios.de/openocd/trunk@1547 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-04-27 16:08:25 +00:00
mlu 573d9a0368 Added arm_adi_v5.c/h, to replace cortex_swjdp.c/h. Better conformance to ARM Debug Interface rev 5 documentation and remoed code specific to the Cortex-M3 targets. 
git-svn-id: svn://svn.berlios.de/openocd/trunk@1535 b42882b7-edfa-0310-969c-e2dbd0fdcd60
 2009-04-27 08:21:35 +00:00