Fix cut and paste error in docs. (#352)
Fixes #349. Change-Id: I5cfd5b28eef463cfa1faa3d1d766eb3e3f52904a
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@ -9117,7 +9117,7 @@ command can be used if OpenOCD gets this wrong, or a target implements custom
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CSRs.
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CSRs.
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@end deffn
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@end deffn
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@deffn Command {riscv expose_csrs} n0[-m0][,n1[-m1]]...
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@deffn Command {riscv expose_custom} n0[-m0][,n1[-m1]]...
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The RISC-V Debug Specification allows targets to expose custom registers
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The RISC-V Debug Specification allows targets to expose custom registers
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through abstract commands. (See Section 3.5.1.1 in that document.) This command
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through abstract commands. (See Section 3.5.1.1 in that document.) This command
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configures a list of inclusive ranges of those registers to expose. Number 0
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configures a list of inclusive ranges of those registers to expose. Number 0
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