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riscv-openocd
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Fix style issues. Code cleanup.

This commit is contained in:
Ryan Macdonald 2018-04-17 10:47:44 -07:00
parent 4f4d5f46f1
commit e025cb320c
1 changed files with 4 additions and 4 deletions
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6
src/target/riscv/riscv-013.c
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@ -283,7 +283,7 @@ static void decode_dmi(char *text, unsigned address, unsigned data)
{ DMI_DMCONTROL, DMI_DMCONTROL_RESUMEREQ, "resumereq" }, { DMI_DMCONTROL, DMI_DMCONTROL_RESUMEREQ, "resumereq" },
{ DMI_DMCONTROL, DMI_DMCONTROL_HARTRESET, "hartreset" }, { DMI_DMCONTROL, DMI_DMCONTROL_HARTRESET, "hartreset" },
{ DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" }, { DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" },
{ DMI_DMCONTROL, DMI_DMCONTROL_HARTSELLO, "hartsel" }, { DMI_DMCONTROL, DMI_DMCONTROL_HARTSELLO, "hartsello" },
{ DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" }, { DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" },
{ DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" }, { DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" },
@ -2941,7 +2941,7 @@ static int riscv013_test_sba_config_reg(struct target *target,
read_sbcs_nonbusy(target, &sbcs); read_sbcs_nonbusy(target, &sbcs);
curr_addr = sb_read_address(target); curr_addr = sb_read_address(target);
if ((curr_addr - prev_addr != (uint32_t)(1 << sbaccess)) && (i != 0)) { if ((curr_addr - prev_addr != (uint32_t)(1 << sbaccess)) && (i != 0)) {
LOG_ERROR("System Bus Access Test 2: Error with address auto-increment, sbaccess = %x", sbaccess); LOG_ERROR("System Bus Access Test 2: Error with address auto-increment, sbaccess = %x.", sbaccess);
test_passed = false; test_passed = false;
} }
dmi_write(target, DMI_SBDATA0, i); dmi_write(target, DMI_SBDATA0, i);
@ -2968,7 +2968,7 @@ static int riscv013_test_sba_config_reg(struct target *target,
read_sbcs_nonbusy(target, &sbcs); read_sbcs_nonbusy(target, &sbcs);
if (i != val) { if (i != val) {
LOG_ERROR("System Bus Access Test 2: Error reading auto-incremented address," LOG_ERROR("System Bus Access Test 2: Error reading auto-incremented address,"
"expected val = %x, read val = %x", i, val); "expected val = %x, read val = %x.", i, val);
test_passed = false; test_passed = false;
} }
} }