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target/cortex_m: rename CamelCase symbol 

Change-Id: I67d803e15ba9fd08f2b31361fb3604275e483605
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6339
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Xiang W <wxjstz@126.com>
This commit is contained in:
Antonio Borneo 2021-06-06 17:20:30 +02:00
parent 67cb50e26a
commit c0ea4295df
3 changed files with 3 additions and 3 deletions
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2
src/jtag/drivers/stlink_usb.c
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@ -2286,7 +2286,7 @@ static int stlink_usb_write_reg(void *handle, unsigned int regsel, uint32_t val)
if (res != ERROR_OK) if (res != ERROR_OK)
return res; return res;
return stlink_usb_write_debug_reg(h, DCB_DCRSR, DCRSR_WnR | (regsel & 0x7f)); return stlink_usb_write_debug_reg(h, DCB_DCRSR, DCRSR_WNR | (regsel & 0x7f));
/* FIXME: poll DHCSR.S_REGRDY after write DCRSR */ /* FIXME: poll DHCSR.S_REGRDY after write DCRSR */
} }

2
src/target/cortex_m.c
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@ -169,7 +169,7 @@ static int cortex_m_store_core_reg_u32(struct target *target,
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regsel | DCRSR_WnR); retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regsel | DCRSR_WNR);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;

2
src/target/cortex_m.h
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@ -77,7 +77,7 @@ struct cortex_m_part_info {
#define DCB_DEMCR 0xE000EDFC #define DCB_DEMCR 0xE000EDFC
#define DCB_DSCSR 0xE000EE08 #define DCB_DSCSR 0xE000EE08
#define DCRSR_WnR BIT(16) #define DCRSR_WNR BIT(16)
#define DWT_CTRL 0xE0001000 #define DWT_CTRL 0xE0001000
#define DWT_CYCCNT 0xE0001004 #define DWT_CYCCNT 0xE0001004