armv7m: Fix memory leak in register caching.

Change-Id: I184042d277a52f3940d6d6c13f3d94afc557933d
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
[andreas.fritiofson@gmail.com: don't check pointers before free()]
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2881
Tested-by: jenkins
This commit is contained in:
Marc Schink 2015-06-30 09:40:28 +02:00 committed by Spencer Oliver
parent 33e406824c
commit b01b5fe13a
3 changed files with 38 additions and 1 deletions

View File

@ -622,6 +622,34 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target)
return cache; return cache;
} }
void armv7m_free_reg_cache(struct target *target)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
struct arm *arm = &armv7m->arm;
struct reg_cache *cache;
struct reg *reg;
unsigned int i;
cache = arm->core_cache;
if (!cache)
return;
for (i = 0; i < cache->num_regs; i++) {
reg = &cache->reg_list[i];
free(reg->feature);
free(reg->reg_data_type);
free(reg->value);
}
free(cache->reg_list[0].arch_info);
free(cache->reg_list);
free(cache);
arm->core_cache = NULL;
}
static int armv7m_setup_semihosting(struct target *target, int enable) static int armv7m_setup_semihosting(struct target *target, int enable)
{ {
/* nothing todo for armv7m */ /* nothing todo for armv7m */

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@ -186,6 +186,8 @@ struct armv7m_algorithm {
}; };
struct reg_cache *armv7m_build_reg_cache(struct target *target); struct reg_cache *armv7m_build_reg_cache(struct target *target);
void armv7m_free_reg_cache(struct target *target);
enum armv7m_mode armv7m_number_to_mode(int number); enum armv7m_mode armv7m_number_to_mode(int number);
int armv7m_mode_to_number(enum armv7m_mode mode); int armv7m_mode_to_number(enum armv7m_mode mode);

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@ -1694,7 +1694,10 @@ void cortex_m_deinit_target(struct target *target)
struct cortex_m_common *cortex_m = target_to_cm(target); struct cortex_m_common *cortex_m = target_to_cm(target);
free(cortex_m->fp_comparator_list); free(cortex_m->fp_comparator_list);
cortex_m_dwt_free(target); cortex_m_dwt_free(target);
armv7m_free_reg_cache(target);
free(cortex_m); free(cortex_m);
} }
@ -1924,10 +1927,14 @@ int cortex_m_examine(struct target *target)
armv7m->arm.core_cache->num_regs > ARMV7M_NUM_CORE_REGS_NOFP) { armv7m->arm.core_cache->num_regs > ARMV7M_NUM_CORE_REGS_NOFP) {
/* free unavailable FPU registers */ /* free unavailable FPU registers */
size_t idx; size_t idx;
for (idx = ARMV7M_NUM_CORE_REGS_NOFP; for (idx = ARMV7M_NUM_CORE_REGS_NOFP;
idx < armv7m->arm.core_cache->num_regs; idx < armv7m->arm.core_cache->num_regs;
idx++) idx++) {
free(armv7m->arm.core_cache->reg_list[idx].value); free(armv7m->arm.core_cache->reg_list[idx].value);
free(armv7m->arm.core_cache->reg_list[idx].feature);
free(armv7m->arm.core_cache->reg_list[idx].reg_data_type);
}
armv7m->arm.core_cache->num_regs = ARMV7M_NUM_CORE_REGS_NOFP; armv7m->arm.core_cache->num_regs = ARMV7M_NUM_CORE_REGS_NOFP;
} }