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A couple fixes.

This commit is contained in:
Greg Savin 2019-04-08 11:14:30 -07:00
parent c17c6f73c2
commit a740a06bbc
2 changed files with 2 additions and 7 deletions
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2
src/target/riscv/riscv.c
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@ -206,7 +206,7 @@ struct scan_field _bscan_tunneled_select_dmi[] = {
}
};
struct scan_field *bscan_tunneled_select_dmi = _bscan_tunneled_select_dmi;
uint32_t bscan_tunneled_select_dmi_num_fields = sizeof(bscan_tunneled_select_dmi)/sizeof(bscan_tunneled_select_dmi[0]);
uint32_t bscan_tunneled_select_dmi_num_fields = DIM(_bscan_tunneled_select_dmi);
#endif
struct trigger {

7
tcl/board/sifive-e31arty-onboard-ftdi.cfg
View File

@ -6,15 +6,10 @@
set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 6; # -expected-id 0x0362d093
# Arrange for bscan tunneling mode to become active after the JTAG chain is verified (or has been reset but even if the full verification sequence wasn't perfect)
jtag configure $_CHIPNAME.cpu -event setup {
ftdi_bscan_mode on
}
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 -bscan-tunnel-ir-width 5
# Uncomment if hardware has flash
# flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000