DM36x: Use enable bit for PLL pre-divider
The PLL pre- and postdividers seem to have enable bits, although these are not mentioned in the chip documentation. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
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@ -179,7 +179,7 @@ proc pll_v03_setup {pll_addr mult config} {
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mww [expr $pll_addr + 0x0110] [expr ($mult / 2) & 0x1ff]
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mww [expr $pll_addr + 0x0110] [expr ($mult / 2) & 0x1ff]
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if { [dict exists $config prediv] } {
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if { [dict exists $config prediv] } {
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set div [dict get $config prediv]
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set div [dict get $config prediv]
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set div [expr ($div - 1)]
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set div [expr 0x8000 | ($div - 1)]
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mww [expr $pll_addr + 0x0114] $div
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mww [expr $pll_addr + 0x0114] $div
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}
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}
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if { [dict exists $config postdiv] } {
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if { [dict exists $config postdiv] } {
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