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Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode. 

By enabling this bit, the processor halts when a debug event
such as breakpoint occurs.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2668 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2009-09-04 08:22:02 +00:00
parent ee329275d3
commit 81b57a3fb6
1 changed files with 7 additions and 0 deletions
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7
src/target/cortex_a8.c
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@ -430,6 +430,13 @@ int cortex_a8_halt(target_t *target)
retval = mem_ap_write_atomic_u32(swjdp, retval = mem_ap_write_atomic_u32(swjdp,
OMAP3530_DEBUG_BASE + CPUDBG_DRCR, 0x1); OMAP3530_DEBUG_BASE + CPUDBG_DRCR, 0x1);
/*
* enter halting debug mode
*/
mem_ap_read_atomic_u32(swjdp, OMAP3530_DEBUG_BASE + CPUDBG_DSCR, &dscr);
retval = mem_ap_write_atomic_u32(swjdp,
OMAP3530_DEBUG_BASE + CPUDBG_DSCR, dscr | (1 << DSCR_HALT_DBG_MODE));
if (retval != ERROR_OK) if (retval != ERROR_OK)
goto out; goto out;