Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.
By enabling this bit, the processor halts when a debug event such as breakpoint occurs. git-svn-id: svn://svn.berlios.de/openocd/trunk@2668 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -430,6 +430,13 @@ int cortex_a8_halt(target_t *target)
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retval = mem_ap_write_atomic_u32(swjdp,
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OMAP3530_DEBUG_BASE + CPUDBG_DRCR, 0x1);
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/*
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* enter halting debug mode
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*/
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mem_ap_read_atomic_u32(swjdp, OMAP3530_DEBUG_BASE + CPUDBG_DSCR, &dscr);
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retval = mem_ap_write_atomic_u32(swjdp,
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OMAP3530_DEBUG_BASE + CPUDBG_DSCR, dscr | (1 << DSCR_HALT_DBG_MODE));
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if (retval != ERROR_OK)
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goto out;
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