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target: cortex_m: replace 'implementor' with 'implementer' 

ARM documentation for Cortex-M reports the field 'implementer' in
the register CPUID.
OpenOCD used the miss-spelled 'implementor'. Fix it!

Change-Id: I854d223971ae7a49346e1f7491c2c0415f5e2c1d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8318
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
This commit is contained in:
Antonio Borneo 2024-06-04 11:50:19 +02:00
parent fbb16b05da
commit 6da4025167
3 changed files with 28 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/target/arm.h
View File

@ -58,12 +58,12 @@ enum arm_arch {
ARM_ARCH_V8M, ARM_ARCH_V8M,
}; };
/** Known ARM implementor IDs */ /** Known ARM implementer IDs */
enum arm_implementor { enum arm_implementer {
ARM_IMPLEMENTOR_ARM = 0x41, ARM_IMPLEMENTER_ARM = 0x41,
ARM_IMPLEMENTOR_INFINEON = 0x49, ARM_IMPLEMENTER_INFINEON = 0x49,
ARM_IMPLEMENTOR_ARM_CHINA = 0x63, ARM_IMPLEMENTER_ARM_CHINA = 0x63,
ARM_IMPLEMENTOR_REALTEK = 0x72, ARM_IMPLEMENTER_REALTEK = 0x72,
}; };
/** /**

4
src/target/cortex_m.c
View File

@ -2612,8 +2612,8 @@ int cortex_m_examine(struct target *target)
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
/* Inspect implementor/part to look for recognized cores */ /* Inspect implementer/part to look for recognized cores */
unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTOR_MASK | ARM_CPUID_PARTNO_MASK); unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTER_MASK | ARM_CPUID_PARTNO_MASK);
for (unsigned int n = 0; n < ARRAY_SIZE(cortex_m_parts); n++) { for (unsigned int n = 0; n < ARRAY_SIZE(cortex_m_parts); n++) {
if (impl_part == cortex_m_parts[n].impl_part) { if (impl_part == cortex_m_parts[n].impl_part) {

40
src/target/cortex_m.h
View File

@ -31,36 +31,36 @@
#define CPUID 0xE000ED00 #define CPUID 0xE000ED00
#define ARM_CPUID_IMPLEMENTOR_POS 24 #define ARM_CPUID_IMPLEMENTER_POS 24
#define ARM_CPUID_IMPLEMENTOR_MASK (0xFF << ARM_CPUID_IMPLEMENTOR_POS) #define ARM_CPUID_IMPLEMENTER_MASK (0xFF << ARM_CPUID_IMPLEMENTER_POS)
#define ARM_CPUID_PARTNO_POS 4 #define ARM_CPUID_PARTNO_POS 4
#define ARM_CPUID_PARTNO_MASK (0xFFF << ARM_CPUID_PARTNO_POS) #define ARM_CPUID_PARTNO_MASK (0xFFF << ARM_CPUID_PARTNO_POS)
#define ARM_MAKE_CPUID(impl, partno) ((((impl) << ARM_CPUID_IMPLEMENTOR_POS) & ARM_CPUID_IMPLEMENTOR_MASK) | \ #define ARM_MAKE_CPUID(impl, partno) ((((impl) << ARM_CPUID_IMPLEMENTER_POS) & ARM_CPUID_IMPLEMENTER_MASK) | \
(((partno) << ARM_CPUID_PARTNO_POS) & ARM_CPUID_PARTNO_MASK)) (((partno) << ARM_CPUID_PARTNO_POS) & ARM_CPUID_PARTNO_MASK))
/** Known Arm Cortex masked CPU Ids /** Known Arm Cortex masked CPU Ids
* This includes the implementor and part number, but _not_ the revision or * This includes the implementer and part number, but _not_ the revision or
* patch fields. * patch fields.
*/ */
enum cortex_m_impl_part { enum cortex_m_impl_part {
CORTEX_M_PARTNO_INVALID, CORTEX_M_PARTNO_INVALID,
STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0x132), STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM_CHINA, 0x132),
CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20), CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC20),
CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21), CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC21),
CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23), CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC23),
CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24), CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC24),
CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27), CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC27),
CORTEX_M0P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60), CORTEX_M0P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC60),
CORTEX_M23_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20), CORTEX_M23_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD20),
CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21), CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD21),
CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31), CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD31),
CORTEX_M52_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0xD24), CORTEX_M52_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM_CHINA, 0xD24),
CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22), CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD22),
CORTEX_M85_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD23), CORTEX_M85_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD23),
INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0), INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_INFINEON, 0xDB0),
REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20), REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_REALTEK, 0xd20),
REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22), REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_REALTEK, 0xd22),
}; };
/* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */ /* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */