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flash: fix some minor typo 

Minor typos found by the new checkpatch boosted by the dictionary
provided by 'codespell'.

Change-Id: Ia5f134c91beb483fd865df9e4877e0ec3e789478
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6215
Tested-by: jenkins
This commit is contained in:
Antonio Borneo 2021-01-28 12:51:44 +01:00
parent 2a1f3b2574
commit 583be907cf
6 changed files with 6 additions and 6 deletions
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2
src/flash/nand/core.h
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@ -100,7 +100,7 @@ struct nand_info {
const char *name; const char *name;
}; };
/* Option constants for bizarre disfunctionality and real features /* Option constants for bizarre dysfunctionality and real features
*/ */
enum { enum {
/* Chip can not auto increment pages */ /* Chip can not auto increment pages */

2
src/flash/nor/kinetis.c
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@ -2803,7 +2803,7 @@ static int kinetis_blank_check(struct flash_bank *bank)
struct kinetis_chip *k_chip = k_bank->k_chip; struct kinetis_chip *k_chip = k_bank->k_chip;
int result; int result;
/* suprisingly blank check does not work in VLPR and HSRUN modes */ /* surprisingly blank check does not work in VLPR and HSRUN modes */
result = kinetis_check_run_mode(k_chip); result = kinetis_check_run_mode(k_chip);
if (result != ERROR_OK) if (result != ERROR_OK)
return result; return result;

2
src/flash/nor/mrvlqspi.c
View File

@ -37,7 +37,7 @@
#define QSPI_W_EN (0x1) #define QSPI_W_EN (0x1)
#define QSPI_SS_DISABLE (0x0) #define QSPI_SS_DISABLE (0x0)
#define QSPI_SS_ENABLE (0x1) #define QSPI_SS_ENABLE (0x1)
#define WRITE_DISBALE (0x0) #define WRITE_DISABLE (0x0)
#define WRITE_ENABLE (0x1) #define WRITE_ENABLE (0x1)
#define QSPI_TIMEOUT (1000) #define QSPI_TIMEOUT (1000)

2
src/flash/nor/msp432.h
View File

@ -43,7 +43,7 @@
#define P4_SECTOR_LENGTH 0x1000 #define P4_SECTOR_LENGTH 0x1000
#define P4_ALGO_ENTRY_ADDR 0x01000110 #define P4_ALGO_ENTRY_ADDR 0x01000110
/* MSP432E4 flash paramters */ /* MSP432E4 flash parameters */
#define E4_FLASH_BASE FLASH_BASE #define E4_FLASH_BASE FLASH_BASE
#define E4_FLASH_SIZE 0x100000 #define E4_FLASH_SIZE 0x100000
#define E4_SECTOR_LENGTH 0x4000 #define E4_SECTOR_LENGTH 0x4000

2
src/flash/nor/nrf5.c
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@ -1038,7 +1038,7 @@ static int nrf5_write(struct flash_bank *bank, const uint8_t *buffer,
* RM reads: Code running from code region 1 will not be able to write * RM reads: Code running from code region 1 will not be able to write
* to code region 0. * to code region 0.
* Unfortunately the flash loader running from RAM can write to both * Unfortunately the flash loader running from RAM can write to both
* code regions whithout any hint the protection is violated. * code regions without any hint the protection is violated.
* *
* Update protection state and check if any flash sector to be written * Update protection state and check if any flash sector to be written
* is protected. */ * is protected. */

2
src/flash/nor/stmqspi.c
View File

@ -175,7 +175,7 @@ struct stmqspi_flash_bank {
bool octo; bool octo;
struct flash_device dev; struct flash_device dev;
uint32_t io_base; uint32_t io_base;
uint32_t saved_cr; /* in particalar FSEL, DFM bit mask in QUADSPI_CR *AND* OCTOSPI_CR */ uint32_t saved_cr; /* in particular FSEL, DFM bit mask in QUADSPI_CR *AND* OCTOSPI_CR */
uint32_t saved_ccr; /* different meaning for QUADSPI and OCTOSPI */ uint32_t saved_ccr; /* different meaning for QUADSPI and OCTOSPI */
uint32_t saved_tcr; /* only for OCTOSPI */ uint32_t saved_tcr; /* only for OCTOSPI */
uint32_t saved_ir; /* only for OCTOSPI */ uint32_t saved_ir; /* only for OCTOSPI */