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flash/stm32l4: add support of STM32G4 category 4 devices (G491/G4A1) 

STM32G4 cat.4 devices are up to 512 KB of flash memory (single bank)
organized into pages of 2KB each.

Reference: RM0440 rev.4

Change-Id: I0f510e2806c8f824fff8083e2d4f90d68f01046b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5793
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Tarek BOCHKATI 2020-10-15 17:05:48 +01:00 committed by Tomas Vanek
parent 6436f1919c
commit 5829646343
1 changed files with 18 additions and 1 deletions
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19
src/flash/nor/stm32l4x.c
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@ -94,7 +94,7 @@
/* /*
* STM32G4xxx series for reference. * STM32G4xxx series for reference.
* *
* RM0440 (STM32G43x/44x/47x/48x) * RM0440 (STM32G43x/44x/47x/48x/49x/4Ax)
* http://www.st.com/resource/en/reference_manual/dm00355726.pdf * http://www.st.com/resource/en/reference_manual/dm00355726.pdf
* *
* Cat. 2 devices have single bank only, page size is 2kByte. * Cat. 2 devices have single bank only, page size is 2kByte.
@ -104,6 +104,8 @@
* *
* Bank mode is controlled by bit 22 (DBANK) in option bytes register. * Bank mode is controlled by bit 22 (DBANK) in option bytes register.
* Both banks are treated as a single OpenOCD bank. * Both banks are treated as a single OpenOCD bank.
*
* Cat. 4 devices have single bank only, page size is 2kByte.
*/ */
/* Erase time can be as high as 25ms, 10x this and assume it's toast... */ /* Erase time can be as high as 25ms, 10x this and assume it's toast... */
@ -184,6 +186,10 @@ static const struct stm32l4_rev stm32_471_revs[] = {
{ 0x1001, "Z" }, { 0x1001, "Z" },
}; };
static const struct stm32l4_rev stm32_479_revs[] = {
{ 0x1000, "A" },
};
static const struct stm32l4_rev stm32_495_revs[] = { static const struct stm32l4_rev stm32_495_revs[] = {
{ 0x2001, "2.1" }, { 0x2001, "2.1" },
}; };
@ -307,6 +313,16 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.flash_regs_base = 0x40022000, .flash_regs_base = 0x40022000,
.fsize_addr = 0x1FFF75E0, .fsize_addr = 0x1FFF75E0,
}, },
{
.id = 0x479,
.revs = stm32_479_revs,
.num_revs = ARRAY_SIZE(stm32_479_revs),
.device_str = "STM32G49/G4Axx",
.max_flash_size_kb = 512,
.has_dual_bank = false,
.flash_regs_base = 0x40022000,
.fsize_addr = 0x1FFF75E0,
},
{ {
.id = 0x495, .id = 0x495,
.revs = stm32_495_revs, .revs = stm32_495_revs,
@ -952,6 +968,7 @@ static int stm32l4_probe(struct flash_bank *bank)
case 0x464: /* STM32L41/L42xx */ case 0x464: /* STM32L41/L42xx */
case 0x466: /* STM32G03/G04xx */ case 0x466: /* STM32G03/G04xx */
case 0x468: /* STM32G43/G44xx */ case 0x468: /* STM32G43/G44xx */
case 0x479: /* STM32G49/G4Axx */
case 0x497: /* STM32WLEx */ case 0x497: /* STM32WLEx */
/* single bank flash */ /* single bank flash */
page_size_kb = 2; page_size_kb = 2;