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Merge pull request #830 from zqb-all/csr_32bit 

target/riscv: set some csr size to 32
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Tim Newsome 2023-04-06 09:40:59 -07:00 committed by GitHub
parent 21d2787d64 e284aa066e
commit 52b102318b
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 12 additions and 2 deletions
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14
src/target/riscv/riscv.c
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@ -5362,18 +5362,27 @@ int riscv_init_registers(struct target *target)
}
switch (csr_number) {
case CSR_DCSR:
case CSR_MVENDORID:
case CSR_MCOUNTINHIBIT:
r->size = 32;
break;
case CSR_FCSR:
r->size = 32;
/* fall through */
case CSR_FFLAGS:
case CSR_FRM:
case CSR_FCSR:
r->exist = riscv_supports_extension(target, 'F');
r->group = "float";
r->feature = &feature_fpu;
break;
case CSR_SCOUNTEREN:
r->size = 32;
/* fall through */
case CSR_SSTATUS:
case CSR_STVEC:
case CSR_SIP:
case CSR_SIE:
case CSR_SCOUNTEREN:
case CSR_SSCRATCH:
case CSR_SEPC:
case CSR_SCAUSE:
@ -5468,6 +5477,7 @@ int riscv_init_registers(struct target *target)
r->exist = (info->vlenb > 0);
break;
case CSR_MCOUNTEREN:
r->size = 32;
r->exist = riscv_supports_extension(target, 'U');
break;