interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Uwe Hermann <uwe@hermann-uwe.de> spelling fixes 

git-svn-id: svn://svn.berlios.de/openocd/trunk@1428 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe 2009-03-24 06:23:00 +00:00
parent bda849d033
commit 4729bae363
2 changed files with 35 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/target/target/pxi42x.cfg → src/target/target/ixp42x.cfg
View File

@ -4,7 +4,7 @@
if { [info exists CHIPNAME] } { if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME set _CHIPNAME $CHIPNAME
} else { } else {
set _CHIPNAME ipx42x set _CHIPNAME ixp42x
} }
if { [info exists ENDIAN] } { if { [info exists ENDIAN] } {
@ -28,5 +28,5 @@ reset_config srst_only srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME] set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ipxP42x target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x

6
src/target/target/nslu2.cfg
View File

@ -1,7 +1,7 @@
# This is for the LinkSys (CYSCO) LSLU2 board # This is for the LinkSys (CISCO) NSLU2 board
# It is an Intel XSCALE IPX420 CPU. # It is an Intel XSCALE IXP420 CPU.
source [find target/ipx42x.cfg] source [find target/ixp42x.cfg]
# The _TARGETNAME is set by the above. # The _TARGETNAME is set by the above.
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0