Uwe Hermann <uwe@hermann-uwe.de> eal _CPUTAPID entry for the LPC2148. I don't know
if they're the same for all LPC214x, this number is from an Olimex LPC-H2148. The chip on that board is LPC2148FBD64. Also fix a few cosmetic issues and comments in the file and add more docs and pointers to the datasheet. git-svn-id: svn://svn.berlios.de/openocd/trunk@1427 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@ -1,49 +1,51 @@
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2148
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2148
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0xffffffff
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set _CPUTAPID 0x4f1f0f0f
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}
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#delays on reset lines
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jtag_nsrst_delay 200
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jtag_ntrst_delay 200
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# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
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# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
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# JTAG, power-on reset is not enough, i.e. you need to perform a
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# reset before being able to talk to the LPC2148, attach is not
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# possible.
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# reset before being able to talk to the LPC2148, attach is not possible.
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst srst_pulls_trst
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
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$_TARGETNAME configure -event reset-init {
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# Force target into ARM state
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# Force target into ARM state.
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soft_reset_halt
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#do not remap 0x0000-0x0020 to anything but the flash
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mwb 0xE01FC040 0x01
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# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
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# "User Flash Mode" where interrupt vectors are _not_ remapped,
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# and reside in flash instead).
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#
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# See section 7.1 on page 32 ("Memory Mapping control register") in
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# "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
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# http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
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mwb 0xE01FC040 0x01
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}
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#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
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# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
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flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
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