interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Once more... Less sloppy this time. 

Change-Id: I4a24e777af3a0d8e072bc1bce0b314738393aa86
This commit is contained in:
Tim Newsome 2018-03-27 11:42:32 -07:00
parent 0c05aafbf8
commit 224e7b4f16
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/target/riscv/riscv.c
View File

@ -2329,7 +2329,7 @@ int riscv_init_registers(struct target *target)
* U-mode but without U-mode trap support, the medeleg and * U-mode but without U-mode trap support, the medeleg and
* mideleg registers should not exist." */ * mideleg registers should not exist." */
r->exist = riscv_supports_extension(target, 'S') || r->exist = riscv_supports_extension(target, 'S') ||
!riscv_supports_extension(target, 'N'); riscv_supports_extension(target, 'N');
break; break;
} }