riscv-openocd/tcl/target/feroceon.cfg

######################################
# Target:    Marvell Feroceon CPU core
######################################

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME feroceon
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x20a023d3
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME

reset_config trst_and_srst
adapter srst delay 200
jtag_ntrst_delay 200