2022-06-12 16:42:27 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2016-07-14 13:00:23 -05:00
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# Maxim Integrated MAX32625 OpenOCD target configuration file
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# www.maximintegrated.com
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# adapter speed
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2019-08-23 08:51:00 -05:00
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adapter speed 4000
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2016-07-14 13:00:23 -05:00
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# reset pin configuration
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reset_config srst_only
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if {[using_jtag]} {
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jtag newtap max32625 cpu -irlen 4 -irmask 0xf -expected-id 0x4ba00477 -ignore-version
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jtag newtap maxtest tap -irlen 4 -irmask 0xf -ircapture 0x1 -expected-id 0x07f71197 -ignore-version
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} else {
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swd newdap max32625 cpu -irlen 4 -irmask 0xf -expected-id 0x2ba01477 -ignore-version
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}
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# target configuration
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target create max32625.cpu cortex_m -chain-position max32625.cpu
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max32625.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000
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# Config Command: flash bank name driver base size chip_width bus_width target [driver_options]
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# flash bank <name> max32xxx <base> <size> 0 0 <target> <flc base> <sector> <clk> <burst>
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# max32625 flash base address 0x00000000
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# max32625 flash size 0x80000 (512k)
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# max32625 FLC base address 0x40002000
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# max32625 sector (page) size 0x2000 (8kB)
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# max32625 clock speed 96 (MHz)
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flash bank max32625.flash max32xxx 0x00000000 0x80000 0 0 max32625.cpu 0x40002000 0x2000 96
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