riscv-openocd/tcl/target/lm3s6965.cfg

# TI/Luminary Stellaris lm3s6965

if { [info exists CHIPNAME] } {	
   set  _CHIPNAME $CHIPNAME    
} else {	 
   set  _CHIPNAME lm3s6965
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3ba00477
}

# jtag speed
jtag_khz 500

jtag_nsrst_delay 100
jtag_ntrst_delay 100

#LM3S6965 Evaluation Board has only srst
reset_config srst_only

#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID

# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s

# 8k working area at base of ram, not backed up
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000

#flash configuration
flash bank stellaris 0 0 0 0 $_TARGETNAME