interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
riscv-openocd/tcl/target/stm32lx_stlink.cfg

21 lines
361 B
INI
Raw Normal View History

cfg: add stlink pseudo stm32 targets Change-Id: I71253c2090162b1214bbbb37396735bb9128f920 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/334 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-01-04 15:48:21 -06:00
#
# STM32lx stlink pseudo target
#
cfg: allow stm32discovery parameter override This enable the user or board config to override the parameters passed to stm32_stlink.cfg. Required to fix a incorrect working area bug with the stm32vldiscovery. Change-Id: I40a4f7913ff37d577d44b1f23befccf0317080a1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/597 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-27 04:41:45 -05:00
if { [info exists CHIPNAME] == 0 } {
set CHIPNAME stm32lx
}
if { [info exists CPUTAPID] == 0 } {
set CPUTAPID 0x2ba01477
}
if { [info exists WORKAREASIZE] == 0 } {
set WORKAREASIZE 0x3800
}
cfg: add stlink pseudo stm32 targets Change-Id: I71253c2090162b1214bbbb37396735bb9128f920 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/334 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-01-04 15:48:21 -06:00
source [find target/stm32_stlink.cfg]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME