107 lines
2.9 KiB
INI
107 lines
2.9 KiB
INI
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# SPDX-License-Identifier: GPL-2.0-or-later
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# script for stm32wbax family
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#
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# stm32wba devices support both JTAG and SWD transports.
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#
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source [find target/swj-dp.tcl]
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source [find mem_helper.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32wbax
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 64kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x10000
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}
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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if { [using_jtag] } {
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set _CPUTAPID 0x6ba00477
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} else {
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# SWD IDCODE (single drop, arm)
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set _CPUTAPID 0x6ba02477
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}
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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if {[using_jtag]} {
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jtag newtap $_CHIPNAME bs -irlen 5
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}
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
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flash bank $_CHIPNAME.otp stm32l4x 0x0FF90000 0 0 0 $_TARGETNAME
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# Common knowledges tells JTAG speed should be <= F_CPU/6.
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# F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
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# the safe side.
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#
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# Note that there is a pretty wide band where things are
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# more or less stable, see http://openocd.zylin.com/#/c/3366/
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adapter speed 500
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adapter srst delay 100
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if {[using_jtag]} {
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jtag_ntrst_delay 100
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}
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reset_config srst_nogate
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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$_TARGETNAME configure -event reset-init {
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# CPU comes out of reset with HSION | HSIRDY.
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# Use HSI 16 MHz clock, compliant even with VOS == 2.
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# 1 WS compliant with VOS == 2 and 16 MHz.
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mmw 0x40022000 0x00000001 0x0000000E ;# FLASH_ACR: Latency = 1
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mmw 0x56020C00 0x00000100 0x00000000 ;# RCC_CR |= HSION
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mmw 0x56020C1C 0x00000000 0x00000002 ;# RCC_CFGR1: SW=HSI16
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# Boost JTAG frequency
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adapter speed 4000
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}
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$_TARGETNAME configure -event reset-start {
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# Reset clock is HSI (16 MHz)
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adapter speed 2000
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}
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$_TARGETNAME configure -event examine-end {
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# Enable debug during low power modes (uses more power)
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# DBGMCU_CR |= DBG_STANDBY | DBG_STOP
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mmw 0xE0042004 0x00000006 0
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# Stop watchdog counters during halt
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# DBGMCU_APB1LFZR |= DBG_IWDG_STOP | DBG_WWDG_STOP
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mmw 0xE0042008 0x00001800 0
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}
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tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
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lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
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proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
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targets $_targetname
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}
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$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
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