2022-06-12 16:48:05 -05:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2010-12-16 08:33:16 -06:00
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################################################################################
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# Author: Michael Trensch (MTrensch@googlemail.com)
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################################################################################
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source [find target/hilscher_netx50.cfg]
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reset_config trst_and_srst
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2019-08-23 08:51:00 -05:00
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adapter srst delay 500
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2010-12-16 08:33:16 -06:00
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jtag_ntrst_delay 500
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$_TARGETNAME configure -work-area-virt 0x10000000 -work-area-phys 0x10000000 -work-area-size 0x4000 -work-area-backup 1
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$_TARGETNAME configure -event reset-init {
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halt
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arm7_9 fast_memory_access enable
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arm7_9 dcc_downloads enable
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sdram_fix
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puts "Configuring SDRAM controller for MT48LC2M32 (8MB) "
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mww 0x1C000140 0
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mww 0x1C000144 0x00A12151
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mww 0x1C000140 0x030D0001
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puts "Configuring SRAM nCS0 for 90ns Par. Flash (x16)"
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mww 0x1C000100 0x01010008
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flash probe 0
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}
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#####################
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# Flash configuration
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#####################
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#flash bank <name> <driver> <base> <size> <chip width> <bus width> <target#>
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flash bank parflash cfi 0xC0000000 0x01000000 2 2 $_TARGETNAME
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init
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reset init
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