2015-12-14 18:20:57 -06:00
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#
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# Renesas Synergy S7 G2 w/ ARM Cortex-M4 @ 240 MHz
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME s7g2
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}
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if { [info exists CPU_JTAG_TAPID] } {
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set _CPU_JTAG_TAPID $CPU_JTAG_TAPID
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} else {
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set _CPU_JTAG_TAPID 0x5ba00477
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}
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if { [info exists CPU_SWD_TAPID] } {
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set _CPU_SWD_TAPID $CPU_SWD_TAPID
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} else {
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set _CPU_SWD_TAPID 0x5ba02477
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}
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source [find target/swj-dp.tcl]
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if { [using_jtag] } {
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set _CPU_TAPID $_CPU_JTAG_TAPID
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} else {
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set _CPU_TAPID $_CPU_SWD_TAPID
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPU_TAPID
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2018-03-23 15:17:29 -05:00
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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2015-12-14 18:20:57 -06:00
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set _TARGETNAME $_CHIPNAME.cpu
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2018-03-23 15:17:29 -05:00
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target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
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2015-12-14 18:20:57 -06:00
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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# 640 KB On-Chip SRAM
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set _WORKAREASIZE 0xa0000
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}
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$_TARGETNAME configure -work-area-phys 0x1ffe0000 \
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-work-area-size $_WORKAREASIZE -work-area-backup 0
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if { ![using_hla] } {
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cortex_m reset_config sysresetreq
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}
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2019-08-23 08:51:00 -05:00
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adapter speed 1000
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