2009-11-10 06:09:15 -06:00
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source [find target/c100.cfg]
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2009-09-10 03:06:22 -05:00
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# basic register defintion for C100
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2009-11-10 06:09:15 -06:00
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source [find target/c100regs.tcl]
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2009-09-10 03:06:22 -05:00
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# board-config info
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2009-11-10 06:09:15 -06:00
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source [find target/c100config.tcl]
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2009-09-10 03:06:22 -05:00
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# C100 helper functions
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2009-11-10 06:09:15 -06:00
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source [find target/c100helper.tcl]
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2009-09-10 03:06:22 -05:00
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# Telo board & C100 support trst and srst
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2009-09-30 18:02:15 -05:00
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# make the reset asserted to
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2009-09-30 00:37:32 -05:00
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# allow RC circuit to discharge for: [ms]
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2010-03-15 10:42:26 -05:00
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adapter_nsrst_assert_width 100
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2009-09-30 00:37:32 -05:00
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jtag_ntrst_assert_width 100
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# don't talk to JTAG after reset for: [ms]
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2010-03-15 10:41:30 -05:00
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adapter_nsrst_delay 100
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2009-09-30 00:37:32 -05:00
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jtag_ntrst_delay 100
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2009-09-10 03:06:22 -05:00
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reset_config trst_and_srst separate
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2009-09-30 00:37:32 -05:00
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2009-09-10 03:06:22 -05:00
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# issue telnet: reset init
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# issue gdb: monitor reset init
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$_TARGETNAME configure -event reset-init {
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2010-03-15 10:37:43 -05:00
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adapter_khz 100
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2009-09-30 00:37:32 -05:00
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# this will setup Telo board
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setupTelo
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2009-09-10 03:06:22 -05:00
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#turn up the JTAG speed
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2010-03-15 10:37:43 -05:00
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adapter_khz 3000
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2010-11-08 03:23:49 -06:00
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echo "JTAG speek now 3MHz"
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echo "type helpC100 to get help on C100"
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2009-09-10 03:06:22 -05:00
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}
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$_TARGETNAME configure -event reset-deassert-post {
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# Force target into ARM state.
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2010-12-18 11:22:53 -06:00
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# soft_reset_halt ;# not implemented on ARM11
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2010-11-08 03:23:49 -06:00
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echo "Detected SRSRT asserted on C100.CPU"
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2009-09-30 18:02:15 -05:00
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2009-09-30 00:37:32 -05:00
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}
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2009-09-21 13:48:22 -05:00
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2009-09-30 00:37:32 -05:00
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$_TARGETNAME configure -event reset-assert-post {
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2010-11-08 03:23:49 -06:00
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echo "Assering reset"
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2009-09-30 00:37:32 -05:00
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#sleep 10
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2009-09-10 03:06:22 -05:00
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}
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2010-11-08 03:23:49 -06:00
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proc power_restore {} { echo "Sensed power restore. No action." }
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proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." }
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2009-09-10 03:06:22 -05:00
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# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
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# it's really 16MB but the upper 8mb is controller via gpio
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# openocd does not support 'complex reads/writes' to NOR
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2009-11-18 04:15:52 -06:00
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
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2009-09-10 03:06:22 -05:00
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# writing data to memory does not work without this
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2010-12-18 11:22:53 -06:00
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arm11 memwrite burst disable
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