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riscv / OpenFPGA
Verilog 0 0
fpga fpga-soc
Updated 2024-11-25 00:20:59 -06:00
riscv / caravel
Verilog 0 0
magic yosys caravel picorv32 openroad openram sky130
Updated 2024-11-04 10:25:41 -06:00
skywater / ethernet
Verilog 0 0
WIP 100BASE-TX PHY
Updated 2023-03-19 10:29:14 -05:00