23 lines
371 B
Systemverilog
23 lines
371 B
Systemverilog
// SPDX-License-Identifier: AGPL-3.0-Only
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/*
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* Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
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*/
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`ifndef COMMON_VH
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`define COMMON_VH
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`ifdef SYNTHESIS
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`define DUMP
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`else
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`define DUMP \
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reg [4096:0] vcdfile; \
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initial begin \
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if ($value$plusargs("vcd=%s", vcdfile)) begin \
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$dumpfile(vcdfile); \
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$dumpvars; \
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end \
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end
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`endif
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`endif /* COMMON_VH */
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