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WIP 100BASE-TX PHY
90 Commits 2 Branches 0 Tags 285 KiB
Verilog 50.1%
Python 46.8%
Makefile 2.3%
SystemVerilog 0.8%
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Sean Anderson 2eac757fd7 Add DP83223-based PMD 
This adds the integrated PMD module to be used with the DP83223. It
contains NRZI en/decoding as well as the I/O interfaces. The rx I/O was
added a while back, and the tx is just the I/O cell.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
 		2022-11-30 18:14:23 -05:00
LICENSES Add licenses 2022-11-05 12:50:12 -04:00
rtl Add DP83223-based PMD 2022-11-30 18:14:23 -05:00
tb Add DP83223-based PMD 2022-11-30 18:14:23 -05:00
.gitignore Add some more files to gitignore 2022-11-05 12:52:57 -04:00
4b5b.gtkw Initial commit 2022-05-23 20:57:03 -04:00
CONTRIBUTING Add licenses 2022-11-05 12:50:12 -04:00
COPYING Add licenses 2022-11-05 12:50:12 -04:00
Makefile Add DP83223-based PMD 2022-11-30 18:14:23 -05:00