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WIP 100BASE-TX PHY
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Verilog 50.1%
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Sean Anderson 24ec0a4150 tb: pmd: Don't die if pmd.delay is absent 
We set this signal for debugging purposes, so don't die if it's absent
(such as in a post-synthesis simulation).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
 		2022-08-06 21:47:21 -04:00
rtl pcs: Fix incorrect assignment type 2022-08-06 21:47:21 -04:00
tb tb: pmd: Don't die if pmd.delay is absent 2022-08-06 21:47:21 -04:00
.gitignore Initial commit 2022-05-23 20:57:03 -04:00
4b5b.gtkw Initial commit 2022-05-23 20:57:03 -04:00
Makefile Initial commit 2022-05-23 20:57:03 -04:00