The PCS state machine is evaluated every cycle, but its outputs are only
registers when the rx_bits module indicates. However, the flush signal
is not registered and is instead combinatorial. Although it's OK to
evaluate the other outputs every cycle, we should only indicate if we
are actually going to change state.
Fixes: d351291 ("Initial commit")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This adds a levels parameter to DUMP, allowing dumping just the
top-level signals, instead of the whole hierarchy. This is helpful for
post-synthesis simulation, where all sub-modules are primitives (with
their inputs and outputs already available at the top level).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
There were two unused variables; remove them. The wrong type of
assignments were used; fix them.
Fixes: d351291 ("Initial commit")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Without this state, receiving would immediately go low. However, figure
24-11 shows that receiving should go low only after an additional code
group (the second idle) is received.
Fixes: d351291 ("Initial commit")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
When the PMA has no new data for us, idle should be determined based on
raw_bits[11:2]. However, we just calculated that last cycle, so we can
reuse it.
Fixes: d351291 ("Initial commit")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
There's no strict requirement for us to handle linke failures immediately.
The PMA's link timer will ensure the signal stays low, so we don't have to
worry about missing it. This fixes some strange Xs during initialization.
Fixes: d351291 ("Initial commit")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson