From e59e34db937c66ca583b7865d920e635c67a71af Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Sat, 14 Jan 2023 00:02:53 -0500 Subject: [PATCH] tb: Fix reset occasionally failing We might not release rst synchronously if clk was already high. Fix this by forcing clk to z. Fixes: 19f2f65 ("axis_mii_tx: Add reset") Signed-off-by: Sean Anderson --- tb/axis_mii_tx.py | 3 ++- tb/axis_replay_buffer.py | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/tb/axis_mii_tx.py b/tb/axis_mii_tx.py index e88b6a1..342d773 100644 --- a/tb/axis_mii_tx.py +++ b/tb/axis_mii_tx.py @@ -6,10 +6,10 @@ import random import zlib import cocotb +from cocotb.binary import BinaryValue from cocotb.clock import Clock from cocotb.regression import TestFactory from cocotb.triggers import ClockCycles, Edge, FallingEdge, First, RisingEdge, Timer -from cocotb.types import LogicArray from cocotb.utils import get_sim_time from . import axis_replay_buffer @@ -21,6 +21,7 @@ import os skip_slow = not os.environ.get('RUN_SLOW', False) async def init(mac): + mac.clk.value = BinaryValue('Z') mac.rst.value = 1 mac.mii_col.value = 0 mac.mii_crs.value = 0 diff --git a/tb/axis_replay_buffer.py b/tb/axis_replay_buffer.py index be9ffd8..2fa740b 100644 --- a/tb/axis_replay_buffer.py +++ b/tb/axis_replay_buffer.py @@ -2,6 +2,7 @@ # Copyright (C) 2022 Sean Anderson import cocotb +from cocotb.binary import BinaryValue from cocotb.clock import Clock from cocotb.regression import TestFactory from cocotb.triggers import ClockCycles, FallingEdge, RisingEdge, Timer @@ -36,6 +37,7 @@ async def send_packet(signals, packet, ratio=1, last_extra=0): @timeout(30, 'us') async def test_replay(buf, in_ratio, out_ratio): + buf.clk.value = BinaryValue('Z') buf.rst.value = 1 buf.s_axis_valid.value = 0 buf.s_axis_last.value = 0