mdio_regs: Add register to enable test modes
This adds a register allowing us to control the test modes of the descrambler and link monitor. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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@ -23,7 +23,9 @@ module mdio_regs (
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output reg loopback,
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output reg loopback,
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output reg pdown,
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output reg pdown,
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output reg isolate,
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output reg isolate,
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output reg coltest
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output reg coltest,
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output reg descrambler_test,
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output reg link_monitor_test
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);
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);
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/* The current price of a CID is $805... */
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/* The current price of a CID is $805... */
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@ -65,6 +67,8 @@ module mdio_regs (
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localparam FCCR = 19;
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localparam FCCR = 19;
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/* Symbol Error Counter Register */
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/* Symbol Error Counter Register */
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localparam SECR = 21;
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localparam SECR = 21;
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/* Vendor Control Register */
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localparam VCR = 30;
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localparam BMCR_RESET = 15;
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localparam BMCR_RESET = 15;
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localparam BMCR_LOOPBACK = 14;
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localparam BMCR_LOOPBACK = 14;
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@ -80,10 +84,16 @@ module mdio_regs (
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localparam BMSR_LSTATUS = 2;
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localparam BMSR_LSTATUS = 2;
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localparam BMSR_EXTCAP = 0;
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localparam BMSR_EXTCAP = 0;
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/* VCR Descrambler test mode */
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localparam VCR_DTEST = 15;
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/* VCR Link monitor test mode */
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localparam VCR_LTEST = 14;
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integer i;
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integer i;
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reg duplex, false_carrier_last, false_carrier_event;
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reg duplex, false_carrier_last, false_carrier_event;
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reg link_status_latched, link_status_latched_next, link_status_last, disconnect;
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reg link_status_latched, link_status_latched_next, link_status_last, disconnect;
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reg loopback_next, pdown_next, isolate_next, duplex_next, coltest_next;
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reg loopback_next, pdown_next, isolate_next, duplex_next, coltest_next;
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reg descrambler_test_next, link_monitor_test_next;
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reg [15:0] data_read_next;
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reg [15:0] data_read_next;
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/* Can't meet timing at 16 bits wide */
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/* Can't meet timing at 16 bits wide */
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reg [COUNTER_WIDTH-1:0] nwc, pwc, dc, fcc, sec;
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reg [COUNTER_WIDTH-1:0] nwc, pwc, dc, fcc, sec;
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@ -104,6 +114,8 @@ module mdio_regs (
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fcc = 0;
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fcc = 0;
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sec = 0;
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sec = 0;
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end
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end
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descrambler_test = 0;
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link_monitor_test = 0;
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end
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end
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always @(*) begin
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always @(*) begin
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@ -115,6 +127,8 @@ module mdio_regs (
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link_status_latched_next = link_status_latched && link_status;
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link_status_latched_next = link_status_latched && link_status;
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disconnect = link_status_last && !link_status;
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disconnect = link_status_last && !link_status;
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false_carrier_event = false_carrier && !false_carrier_last;
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false_carrier_event = false_carrier && !false_carrier_last;
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descrambler_test_next = descrambler_test;
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link_monitor_test_next = link_monitor_test;
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if (ENABLE_COUNTERS) begin
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if (ENABLE_COUNTERS) begin
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nwc_next = nwc;
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nwc_next = nwc;
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@ -163,6 +177,8 @@ module mdio_regs (
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fcc_next = false_carrier_event;
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fcc_next = false_carrier_event;
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sec_next = symbol_error;
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sec_next = symbol_error;
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end
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end
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descrambler_test_next = 0;
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link_monitor_test_next = 0;
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end
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end
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end
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end
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end
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end
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@ -215,6 +231,15 @@ module mdio_regs (
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if (cyc && stb)
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if (cyc && stb)
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sec_next = we ? data_write : symbol_error;
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sec_next = we ? data_write : symbol_error;
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end
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end
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VCR: begin
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data_read_next[VCR_DTEST] = descrambler_test;
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data_read_next[VCR_LTEST] = link_monitor_test;
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if (cyc && stb && we) begin
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descrambler_test_next = data_write[VCR_DTEST];
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link_monitor_test_next = data_write[VCR_LTEST];
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end
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end
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default: begin
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default: begin
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if (EMULATE_PULLUP) begin
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if (EMULATE_PULLUP) begin
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data_read_next = 16'hFFFF;
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data_read_next = 16'hFFFF;
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@ -244,6 +269,8 @@ module mdio_regs (
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fcc <= fcc_next;
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fcc <= fcc_next;
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sec <= sec_next;
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sec <= sec_next;
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end
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end
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descrambler_test <= descrambler_test_next;
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link_monitor_test <= link_monitor_test_next;
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end
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end
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endmodule
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endmodule
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@ -19,6 +19,7 @@ PWCR = 17
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DCR = 18
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DCR = 18
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FCCR = 19
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FCCR = 19
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SECR = 21
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SECR = 21
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VCR = 30
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BMCR_RESET = BIT(15)
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BMCR_RESET = BIT(15)
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BMCR_LOOPBACK = BIT(14)
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BMCR_LOOPBACK = BIT(14)
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@ -34,6 +35,9 @@ BMSR_100BASEXHD = BIT(13)
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BMSR_LSTATUS = BIT(2)
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BMSR_LSTATUS = BIT(2)
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BMSR_EXTCAP = BIT(0)
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BMSR_EXTCAP = BIT(0)
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VCR_DTEST = BIT(15)
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VCR_LTEST = BIT(14)
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@cocotb.test(timeout_time=1, timeout_unit='us')
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@cocotb.test(timeout_time=1, timeout_unit='us')
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async def test_mdio(regs):
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async def test_mdio(regs):
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regs.cyc.value = 1
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regs.cyc.value = 1
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@ -65,17 +69,20 @@ async def test_mdio(regs):
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if data is None and regs.ack.value:
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if data is None and regs.ack.value:
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return regs.data_read.value
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return regs.data_read.value
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async def bmcr_toggle(bit, signal):
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async def reg_toggle(reg, bit, signal, ro_mask=0):
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if signal:
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if signal:
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assert not signal.value
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assert not signal.value
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await xfer(BMCR, bit)
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await xfer(reg, bit)
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if signal:
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if signal:
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assert signal.value
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assert signal.value
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assert await xfer(BMCR) == (BMCR_SPEED_LSB | bit)
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assert await xfer(reg) == (ro_mask | bit)
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await xfer(BMCR, 0)
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await xfer(reg, 0)
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if signal:
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if signal:
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assert not signal.value
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assert not signal.value
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def bmcr_toggle(bit, signal):
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return reg_toggle(BMCR, bit, signal, ro_mask=BMCR_SPEED_LSB)
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assert await xfer(BMCR) == (BMCR_SPEED_LSB | BMCR_ISOLATE)
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assert await xfer(BMCR) == (BMCR_SPEED_LSB | BMCR_ISOLATE)
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await bmcr_toggle(BMCR_LOOPBACK, regs.loopback)
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await bmcr_toggle(BMCR_LOOPBACK, regs.loopback)
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await bmcr_toggle(BMCR_PDOWN, regs.pdown)
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await bmcr_toggle(BMCR_PDOWN, regs.pdown)
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@ -123,3 +130,6 @@ async def test_mdio(regs):
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await counter_test(DCR, regs.link_status, True, False)
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await counter_test(DCR, regs.link_status, True, False)
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await counter_test(FCCR, regs.false_carrier, True)
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await counter_test(FCCR, regs.false_carrier, True)
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await counter_test(SECR, regs.symbol_error)
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await counter_test(SECR, regs.symbol_error)
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await reg_toggle(VCR, VCR_DTEST, regs.descrambler_test)
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await reg_toggle(VCR, VCR_LTEST, regs.link_monitor_test)
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