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README: Add a section on licensing 

Add a section documenting the license used for this project.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
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Sean Anderson 2023-03-15 14:58:14 -04:00
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@ -301,3 +301,8 @@ non-pipelined mode. Generally, `RST`, `TGA`, `TGC`, `TGD`, `RTY`, `SEL`, and
`LOCK` signals are omitted. The `_I` and `_O` suffixes are not used. `DAT` is `LOCK` signals are omitted. The `_I` and `_O` suffixes are not used. `DAT` is
named `data_read` or `data_write`, depending on the direction of transfer. `ADR` named `data_read` or `data_write`, depending on the direction of transfer. `ADR`
is expanded to `addr`. is expanded to `addr`.
== Licensing
All cores are licensed under AGPL 3. See COPYING for details. Contact me if you
are interested in using these cores under a different license.